mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 506

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mcf51ac256a

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mcf51ac256a
Description
Mcf51ac Flexis
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Version 1 ColdFire Debug (CF1_DEBUG)
22-14
ERASE (W)
SEC (R)
ENBDM
Field
23–3
25
24
The read value of this bit typically defines the status of the flash security field.
0 Flash security is disabled
1 Flash security is enabled
In addition, the SEC bit is context-sensitive during reads. After a mass-erase sequence has been initiated by
BDM, it acts as a flash busy flag. When the erase operation is complete and the bit is cleared, it returns to reflect
the status of the chip security.
0 Flash is not busy performing a BDM mass-erase sequence
1 Flash is busy performing a BDM mass-erase sequence
During writes, this bit qualifies XCSR[ESEQC] for the write modes shown in the ESEQC field description.
0 Do not perform a mass-erase of the flash.
1 Perform a mass-erase of the flash, using the sequence specified in the XCSR[ESEQC] field.
Enable BDM.
0 BDM mode is disabled
1 Active background mode is enabled (assuming the flash is not secure)
Reserved for future use by the debug module, must be cleared.
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
Table 22-7. XCSR Field Descriptions (continued)
Description
Freescale Semiconductor

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