mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 429
mcf51ac256a
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mcf51ac256a
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Mcf51ac Flexis
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF51AC256A.pdf
(566 pages)
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Figure 19-1
simpler connections where data is unidirectionally transferred from the master MCU to a slave or from a
slave to the master MCU.
19.1.2.2
Figure 19-2
Data is written to the double-buffered transmitter (write to SPI1D) and gets transferred to the SPI shift
register at the start of a data transfer. After shifting in a byte of data, the data is transferred into the
double-buffered receiver where it can be read (read from SPI1D). Pin multiplexing logic controls
connections between MCU pins and the SPI module.
When the SPI is configured as a master, the clock output is routed to the SPSCK pin, the shifter output is
routed to MOSI, and the shifter input is routed from the MISO pin.
When the SPI is configured as a slave, the SPSCK pin is routed to the clock input of the SPI, the shifter
output is routed to MISO, and the shifter input is routed from the MOSI pin.
In the external SPI system, simply connect all SPSCK pins to each other, all MISO pins together, and all
MOSI pins together. Peripheral devices often use slightly different names for these pins.
Freescale Semiconductor
shows a system where data is exchanged between two MCUs, many practical systems involve
is a block diagram of the SPI module. The central element of the SPI is the SPI shift register.
SPI Module Block Diagram
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
8-Bit Serial Peripheral Interface (SPIV3)
19-3
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