mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 211

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

When BDM is active, the FTM counter is frozen (this is the value that will be read by user); the read
coherency mechanism is frozen such that the buffer latches remain in the state they were in when the BDM
became active, even if one or both counter halves are read while BDM is active. This assures that if the
user was in the middle of reading a 16-bit register when BDM became active, it will read the appropriate
value from the other half of the 16-bit value after returning to normal execution.
11.3.5
The read/write FTM modulo registers contain the modulo value for the FTM counter. After the FTM
counter reaches the modulo value, the overflow flag (TOF) becomes set at the next clock, and the next
value of FTM counter depends on the selected counting method
Reset sets the FTM counter modulo registers to 0x0000.
Writing to FTMxMODH or FTMxMODL inhibits the TOF bit and overflow interrupts until these registers
are updated with the value of their write buffer
Writing to either byte (FTMxMODH or FTMxMODL) latches the value into a buffer. The registers are
updated with the value of their write buffer according to
buffers.
If FTMEN = 0, then this write coherency mechanism may be manually reset by writing to the FTMxSC
register (whether BDM is active or not).
When BDM is active, this write coherency mechanism is frozen such that the buffer latches remain in the
state they were in when the BDM became active, even if one or both halves of the modulo register are
written while BDM is active. Any write to the modulo registers bypasses the buffer latches and directly
writes to the modulo register while BDM is active.
Freescale Semiconductor
Reset
Reset
W
W
R
R
Bit 15
Bit 7
FTM Counter Modulo Registers (FTMxMODH:FTMxMODL)
0
0
7
7
Any write to FTMxCNTL updates the 16-bit counter with its initial value (FTMxCNTINH:FTMxCNTINL)
The update of the TOF bit and the generation of the overflow interrupt are
disabled when there is a write to FTMxMODH or FTMxMODL. This
condition will remain until the FTMxMODH:L registers are updated with
the contents of their write buffers. This could be several timer count periods.
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
Figure 11-5. FTM Counter Modulo Register High (FTMxMODH)
14
6
0
0
6
6
Figure 11-4. FTM Counter Register Low (FTMxCNTL)
13
5
5
0
5
0
(11.4.10, “Load of the registers with write
12
4
0
0
4
4
NOTE
Section 11.4.10, “Load of the registers with write
11
3
0
0
3
3
(Section 11.4.3,
10
2
0
0
2
2
“Counter).
FlexTimer Module (FTMV1)
1
1
0
1
9
0
buffers).
Bit 0
Bit 8
0
0
0
0
11-11