mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 218

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mcf51ac256a

Manufacturer Part Number
mcf51ac256a
Description
Mcf51ac Flexis
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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FlexTimer Module (FTMV1)
11.3.11 FTM Synchronization Register (FTMxSYNC)
This read/write register configures the PWM synchronization.
A synchronization event can perform the synchronized update of FTMxMODH:FTMxMODL,
FTMxCnVH:FTMxCnVL and FTMxOUTMASK registers with the value of their write buffer and the
FTM counter initialization.
11-18
Reset
SYNCHOM
SWSYNC
W
R
TRIG2
TRIG1
TRIG0
Field
7
6
5
4
3
SWSYNC
0
7
PWM synchronization software trigger. SWSYNC bit selects the software trigger as the PWM
synchronization trigger. The software trigger happens when a logic 1 is written to SWSYNC bit.
0 Software trigger is not selected.
1 Software trigger is selected.
PWM synchronization external trigger 2. TRIG2 bit selects external trigger 2 as the PWM synchronization
trigger. External trigger 2 happens when the FTM detects a rising edge in the trigger 2 input signal.
0 External trigger 2 is not selected.
1 External trigger 2 is selected.
PWM synchronization external trigger 1. TRIG1 bit selects external trigger 1 as the PWM synchronization
trigger. External trigger 1 happens when the FTM detects a rising edge in the trigger 1 input signal.
0 External trigger 1 is not selected.
1 External trigger 1 is selected.
PWM synchronization external trigger 0. TRIG0 bit selects external trigger 0 as the PWM synchronization
trigger. External trigger 0 happens when the FTM detects a rising edge in the trigger 0 input signal.
0 External trigger 0 is not selected.
1 External trigger 0 is selected.
Output mask synchronization. SYNCHOM bit selects when the CHnOM bits in register FTMxOUTMASK are
updated with the value of their write buffer.
0 CHnOM bits are updated with the value of the FTMxOUTMASK write buffer in all rising edges of the
1 CHnOM bits are updated with the value of the FTMxOUTMASK write buffer by the PWM synchronization.
system clock.
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
= Unimplemented or Reserved
TRIG2
Figure 11-14. FTM Synchronization Register (FTMxSYNC)
0
6
Table 11-11. FTMxSYNC Field Descriptions
TRIG1
5
0
TRIG0
0
4
Description
SYNCHOM
0
3
REINIT
0
2
CNTMAX
Freescale Semiconductor
1
0
CNTMIN
0
0

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