mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 134

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

ColdFire Core
7.2.2
These registers can be used as software stack pointers, index registers, or base address registers. They can
also be used for word and longword operations.
7.2.3
This ColdFire architecture supports two independent stack pointer (A7) registers—the supervisor stack
pointer (SSP) and the user stack pointer (USP). The hardware implementation of these two
program-visible 32-bit registers does not identify one as the SSP and the other as the USP. Instead, the
hardware uses one 32-bit register as the active A7 and the other as OTHER_A7. Thus, the register contents
are a function of the processor operation mode, as shown in the following:
if SR[S] = 1
The BDM programming model supports direct reads and writes to A7 and OTHER_A7. It is the
responsibility of the external development system to determine, based on the setting of SR[S], the mapping
of A7 and OTHER_A7 to the two program-visible definitions (SSP and USP).
7-4
(D0, D1)
(D2-D7)
Reset
Reset
Reset – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
BDM: Load: 0x60 + n; n = 0-7 (Dn)
BDM: Load: 0x68 + n; n = 0–6 (An)
then
else
W
W
R
R
Address Registers (A0–A6)
Supervisor/User Stack Pointers (A7 and OTHER_A7)
Store: 0x40 + n; n = 0-7 (Dn)
Store: 0x48 + n; n = 0–6 (An)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
– – – – – – – – – – – – – – – – – – – – – – – – – – – – – – – –
Registers D0 and D1 contain hardware configuration details after reset. See
Section 7.3.3.14, “Reset Exception”
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
A7 = Supervisor Stack Pointer
OTHER_A7 = User Stack Pointer
A7 = User Stack Pointer
OTHER_A7 = Supervisor Stack Pointer
Figure 7-3. Address Registers (A0–A6)
Figure 7-2. Data Registers (D0–D7)
See
Section 7.3.3.14, “Reset Exception”
NOTE
for more details.
Address
Data
8
8
7
7
Access: User read/write
Access: User read/write
6
6
Freescale Semiconductor
5
5
BDM read/write
BDM read/write
4
4
3
3
2
2
1
1
0
0