mcf51ac256a Freescale Semiconductor, Inc, mcf51ac256a Datasheet - Page 118

• Manufacturer Part Number: mcf51ac256a
• Description: Mcf51ac Flexis
• Manufacturer: Freescale Semiconductor, Inc

Parallel Input/Output Control
shared peripherals will take priority control over the pins. See
priorities.
Port E is controlled by the registers listed below.
6.5.5.1
6.5.5.2
6-14
Reset:
Reset:
PTEDn
•
•
•
•
•
•
•
•
Field
7–0
W
W
R
R
PTE0 shares its pin with RGPIO0 and TxD1.
PTE1 shares its pin with RGPIO1 and RxD1.
PTE2 shares its pin with RGPIO2 and FTM1CH0.
PTE3 shares its pin with RGPIO3 and FTM1CH1.
PTE4 shares its pin with RGPIO4 and SS1.
PTE5 shares its pin with RGPIO5 and MISO1.
PTE6 shares its pin with RGPIO6 and MOSI1.
PTE7 shares its pin with RGPIO7 and SPSCK1.
PTEDD7
PTED7
Port E Data Register Bits — For port E pins that are inputs, reads return the logic level on the pin. For port E
pins that are configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port E pins that are configured as outputs, the logic level is
driven out the corresponding MCU pin.
Reset forces PTED to all 0s, but these 0s are not driven out the corresponding pins because reset also configures
all port pins as high-impedance inputs with pullups disabled.
Port E Data Register (PTED)
0
Port E Data Direction Register (PTEDD)
0
7
7
MCF51AC256 ColdFire Integrated Microcontroller Reference Manual, Rev. 5
PTEDD6
PTED6
0
0
6
6
Figure 6-23. Port E Data Direction Register (PTEDD)
Table 6-21. PTED Register Field Descriptions
Figure 6-22. Port E Data Register (PTED)
PTEDD5
PTED5
0
0
5
5
PTEDD4
PTED4
0
0
4
4
Description
PTEDD3
PTED3
Table 2-1
3
0
3
0
PTEDD2
PTED2
for details on pin function
0
0
2
2
PTEDD1
Freescale Semiconductor
PTED1
0
0
1
1
PTEDD0
PTED0
0
0
0
0