MT9072 Zarlink Semiconductor, Inc., MT9072 Datasheet - Page 85
MT9072
Manufacturer Part Number
MT9072
Description
Octal T1-E1-J1 Framer
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet
1.MT9072.pdf
(278 pages)
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Advance Information
are useful when cumulative error counts are being recorded. For example, every time the frame error counter
overflow (FEO) interrupt occurs, 256 frame errors have been received since the last FEO interrupt. The
interrupt status register bits are cleared when read. All non-latched error counters are cleared and by
programming the counter clear bit (CNCLR register address Y03) low to high. See Table 43 for counter events
and relationship between the counters.
Register
Address
Y1A
Y2A
Y2B
Y03
Y15
Y16
Y17
Y18
Y19
Y28
Y29
Y36
Y46
Table 42 - Registers Required for Observing and Clearing Error Counters (E1)
DL,CCS,CAS and other
Control Register
PRBS Error Counter and CRC-
4 Multiframe Counter
Loss of basic frame counter
E-bit error counter
Bipolar violation counter. This
counter counts the bipolar
violation outside the HDB3
coding.
CRC-4 error counter
FAS bit error counter and FAS
error counter
E bit error counter latch
BPV error counter latch
CRC-4 error counter latch
FAS error counter latch
CAS,National, CRC-4 local
and timer interrupt status
register
CAS,National, CRC-4 local
and timer interrupt mask
register
Register
The CNCLR bit can be used to clear the non-latched counters.
the ACCLR can be used to automatically clear 1 sec counter.
PRBS counts bit errors and the CRC counter interval for each
received multiframe.
Counter that is incremented once per 125 usec whenever bsync
is 1.
This counter counts the ebit errors.
This counter counts the bipolar violation outside the HDB3
coded zeros.
This counter is incremented for calculated crc-4 errors (CRCS1
and CRCS2).
This counter counts the FAS bit error and FAS errors.
This counter is the one second latched version of Y17.
This counter is a one second latched version of Y18.
This counter is a one second latched version of Y19.
This counter is a one second latched version of Y1A.
Oneseci is the one second interrupt status. This interrupt can be
used for performance monitoring.
Onesecm is the one second interrupt status. This interrupt can
be used for performance monitoring.
Description
MT9072
85
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