MT9072 Zarlink Semiconductor, Inc., MT9072 Datasheet - Page 117

• Manufacturer Part Number: MT9072
• Description: Octal T1-E1-J1 Framer
• Manufacturer: Zarlink Semiconductor, Inc.

Advance Information
15-6
Bit
5
4
3
2
1
0
STLBK
Name
DLBK
RLBK
PLBK
TLU
TLD
(0)
(0)
(0)
(0)
(0)
(0)
#
not used.
Digital Loopback. If one, then the digital streams (TPOS/TNEG) are looped to RPOS/RNEG.
Data coming out of DSTo will be a delayed version of DSTi. Hence the data path is DSTi through
the Transmitter to RPOS/RNEG and through the receiver to DSTo.
Remote Loopback. If one, then all timeslots received on RPOS/RNEG are connected to TPOS/
TNEG on the DS1 side of the MT9072. If zero, then this feature is disabled.
ST-BUS Loopback. If one, then the last bit in the frame and the first 24 timeslots of DSTi are
connected to the last bit in the frame and the first 24 timeslots of DSTo on the ST-BUS side of the
MT9072. If zero, then this feature is disabled. See Loopbacks section.
Payload Loopback. If one, then all timeslots received on RPOS/RNEG are connected to TPOS/
TNEG on the ST-BUS side of the MT9072. Hence DSTo is looped back to DSTi. If zero, then this
feature is disabled. Set the bit RxDO (YF1 bit 9) for the payload loopback data to appear at the
transmitter output.
TxLoopUp Code. If this bit is set inband line loopup code is sent. The loopup code to be sent is
determined by the Tx Loopup Code register. Note that the receiver will detect either framed or
unframed inband loop codes.
TxLoopDown Code. If this bit is set inband line loopdown code is sent. The loopdown code to
be sent is determined by the Tx LoopDown Code register. If both TLU and TLD are set TLD
takes precedence.
Table 69 - LoopBack Control Word (Y05) (T1)
Functional Description
MT9072
117