MT9072 Zarlink Semiconductor, Inc., MT9072 Datasheet - Page 17
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MT9072
Manufacturer Part Number
MT9072
Description
Octal T1-E1-J1 Framer
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet
1.MT9072.pdf
(278 pages)
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Pin Description (continued)
Advance Information
LQFP
114
134
154
34
54
74
15
95
Pin #
LBGA
M14
H16
C14
T13
G1
R4
T6
L2
DSTo[0]
DSTo[4]
DSTi[1]
DSTi[2]
DSTi[3]
DSTi[5]
DSTi[6]
DSTi[7]
Name
Type
O
I
Data ST-BUS. In 2.048Mbit/s ST-BUS mode and IMA mode this pin is
an input for the transmit side of the framer. This pin is not used in
8.192Mbit/s ST-BUS mode. The DSTi data stream is clocked into the
framer by the clock input to pin CKi. Pins DSTi[0-7] are used by
Framers[0-7] respectively.
In T1 mode, this pin accepts a 2.048Mbit/s ST-BUS stream. The first
24 ST-BUS channels contain the data to be transmitted on the PCM24
interface. See Table 1.
In T1 IMA mode, this pin accepts a 1.544Mbit/s serial stream that
contains a framing bit followed by the 24 8-bit channels to be
transmitted on the PCM24 interface, see Table 3. The framing bit is
ignored and an internally generated framing bit is used. IMA mode is
selected by setting the IMA bit (Address Y00) to 1.
In E1 mode, this pin accepts a 2.048Mbit/s ST-BUS stream that
contains the data to be transmitted on the PCM30 interface. See Table
4 and Table 6.
In E1 IMA mode, this pin accepts a 2.048Mbit/s ST-BUS stream that
contains the data to be transmitted on the PCM30 interface. IMA mode
is selected by setting the IMA bit (Address Y00) to 1. See Table 4 and
Table 6.
Data ST-BUS. This pin is an output for the receive side of the framer.
In 2.048Mbit/s ST-BUS mode and IMA mode it operates the same as
DSTo(1-3), it can also operate in 8.192Mbit/s ST-BUS mode. IMA
mode is not available at 8.192Mbit/s. The DSTo data stream is clocked
out of the framer by the clock input to pin CKi.
When operated in 8.192Mbit/s ST-BUS mode this pin outputs a data
stream containing 128 8-bit channels accommodating four framers.
See Table 2 and Table 5. The frame boundary is indicated by the FPi
inputs. Pin DSTo[0] is used by Framers[0-3] and pin DSTo[4] is used
by Framers[4-7].
The 32 ST-BUS channels mapped to each framer are treated as
described for DSTi(1-3) operating at 2.048Mbit/s.
Description (see Notes 1 to 7)
MT9072
17
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