MT9072 Zarlink Semiconductor, Inc., MT9072 Datasheet - Page 29

• Manufacturer Part Number: MT9072
• Description: Octal T1-E1-J1 Framer
• Manufacturer: Zarlink Semiconductor, Inc.

Advance Information
9.0
Table 34 -Framer and Register Access ................................................................................................................. 75
Table 35 -Registers Related to IMA Mode ............................................................................................................ 76
Table 36 -Reset Status (T1) .................................................................................................................................. 77
Table 37 -Reset Status (E1) .................................................................................................................................. 78
10.0 ST-BUS Analyzer ........................................................................................................... 79
11.0 Loopbacks...................................................................................................................... 79
Table 38 -Registers Related to Loopbacks (T1) .................................................................................................... 81
Table 39 -Registers Related to In Band Loopbacks (T1) ...................................................................................... 81
Table 40 -Register Related to Setting Up Loopbacks (E1).................................................................................... 82
12.0 Performance Monitoring ............................................................................................... 84
Table 41 -Error Counters Summary (T1) ............................................................................................................... 84
Table 42 -Registers Required for Observing and Clearing Error Counters (E1) ................................................... 85
Table 43 -Error Counter and Event Dependency (E1) .......................................................................................... 86
13.0 Maintenance and Alarms .............................................................................................. 86
9.1
11.1 T1 Loopbacks......................................................................................................................................... 79
11.2 T1 In Band Loopback Codes.................................................................................................................. 81
11.3 E1 Loopbacks......................................................................................................................................... 82
12.1 T1 Error Counters................................................................................................................................... 84
12.2
13.1 T1 Maintenance and Alarms .................................................................................................................. 86
9.1.1
9.1.2
9.1.3
9.1.4
9.1.5
9.1.6
9.1.7
13.1.1 T1 Error Insertion............................................................................................................................. 86
13.1.2 T1 Per Timeslot Control................................................................................................................... 86
MT9072 Access and Control......................................................................................... 74
9.1.1.1................................................................................................................................. CS and IRQ 75
9.1.5.1............................................................... Reset Operation (RESET Pin, RST Bit and RSTC Bit) 76
9.1.5.2............................................................................................. Transmit AIS Operation (TAIS Pin) 78
9.1.5.3................................................................................ IEEE 1149.1-1990 Test Access Port (TAP) 79
Processor Interface (A11-A0, D15-D0, I/M, DS, R/W, CS, IRQ, Pins) ................................................... 74
E1 Error Counters ................................................................................................................................. 84
Framer and Register Access ........................................................................................................... 74
ST-BUS Interface (DSTi, DSTo, CSTi, CSTo Pins)......................................................................... 75
IMA Interface (DSTi, DSTo, Pins).................................................................................................... 75
Control Pins ..................................................................................................................................... 76
Data Link (DL) Interface (RxDL, RxDLC, TxDL, TxDLC Pins)......................................................... 79
Multiframe Boundary (RxMF, TxMF Pins) ....................................................................................... 79
Signaling Multiframe Boundary (RxMF, TxMF Pins) ...................................................................... 76
Table of Contents (continued)
MT9072
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