MT9072 Zarlink Semiconductor, Inc., MT9072 Datasheet - Page 115

• Manufacturer Part Number: MT9072
• Description: Octal T1-E1-J1 Framer
• Manufacturer: Zarlink Semiconductor, Inc.

Advance Information
15-8
Bit
15-7
Bit
7
6
5
4
3
2
1
0
6
5
4
3
2
1
0
TESFYEL
TXSECY
TT1DMY
D4SECY
TD4YEL
Name
TAIS
SO
CRCE
PERR
Name
BPVE
LOSE
(1)
(0)
(0)
L32Z
#
#
FTE
FSE
(0)
(1)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
#
not used.
Transmit ESF Yellow Alarm. Setting this bit(while in ESF Mode) causes a repeating pattern of
eight 1’s followed by eight 0’s to be sent on the transmit FDL bits. When JYEL is set, all ones
signal is sent on the FDL.
Transmit Secondary Yellow Alarm. When set to 1, the S-bit for transmit frame 12 will to be
set to 1.
Transmit D4 Yellow Alarm. When set, bit 2 of all DS0 channels are forced low. The definition
of Bit 2 is in accordance with Figure 41.
Transmit All Ones. When low, this control bit forces a framed or unframed (depending on the
state of Transmit Alarm Control bit 0) all ones to be transmit at TTIP and TRING.
not used.
Transmit T1DM Yellow Alarm. If this bit is 0 a T1DM yellow alarm is sent on bit 2 of the 24th
timeslot.
D4 Secondary Alarm. Set this bit for trunks employing the secondary Yellow Alarm. The Fs bit
in the 12th frame will not be used for counting errored framing bits. If a one is received in the Fs
bit position of the 12th frame a Secondary Yellow Alarm Detect bit will be set.
S-bit Override. If set, this bit forces the S-bits to be inserted as an overlay on any of the
following alarm conditions: i) transmit all ones, ii) loop up code insertion, iii) loop down code
insertion.
not used.
Digital Loss of Signal Selection. If one, the threshold for digital loss of signal is 32
successive zeros. If zero, the threshold is set to 192 successive zeros.
Bipolar Violation Error Insertion. A zero-to-one transition of this bit inserts a single bipolar
violation error into the transmit DS1 data.
CRC-6 Error Insertion. A zero-to-one transition of this bit inserts a single CRC-6 error into
the transmit ESF DS1 data.
Terminal Framing Bit Error Insertion. A zero-to-one transition of this bit inserts a single
error into the transmit D4 Ft pattern or the transmit ESF framing bit pattern (in ESF mode).
Signal Framing Bit Error Insertion. A zero-to-one transition of this bit inserts a single error
into the transmit Fs bits (in D4 mode only).
Loss of Signal Error Insertion. If one, the MT9072 transmits an all zeros signal (no pulses).
Zero code suppression is overridden. If zero, data is transmitted normally.
Payload Error Insertion. A zero - to - one transition of this bit inserts a single bit error in the
transmit payload.
Table 66 - Transmit Alarm Control Word(Y02) (T1)
Table 67 - Transmit Error Control Word(Y03) (T1)
Functional Description
Functional Description
MT9072
115