MT9072 Zarlink Semiconductor, Inc., MT9072 Datasheet - Page 47
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MT9072
Manufacturer Part Number
MT9072
Description
Octal T1-E1-J1 Framer
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet
1.MT9072.pdf
(278 pages)
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Advance Information
4.1.3
The Ft and Fs bits are identical to the D4 format, channel 24 of each frame has a synchronization byte
consisting of 10111YR0.
Y is used to indicate a yellow alarm and is active low. R bit is reserved by AT&T as an 8 Kb/s communication
channel.
The synchronization is first declared if the Ft bit is in sync and subsequently 6 consecutive T1DM
synchronization bytes are received. The synchronization error criteria for the receiver will be the same as
D4.(i.e 2 out of 4,5 or 6). Although an error is detected if any of 5 synchronization bits or the Ft/Fs bits are
incorrect.The OOF error selection criteria of 2 errors out of 4, 5, 6 bits is also applicable to the T1DM sync byte
format; the error criteria applies to the synchronization byte and the framing bit. The received sync byte can be
monitored by the status register(Y10). The Y bit an be sent by writing to control register(address Y02). The
TIDMR bit can only be input from the Transmit Data Link Pin. The registers and bits used for T1DM are
indicated in the register bit functions.
4.1.4
G.802 mode allows interworking between an E1 and T1 system. The line is operating in T1 mode and the
backplane consists of E1 data. The mapping for the backplane channels to the PCM24 side is as shown Table
10. The 193 bits from the E1 backplane stream are mapped to the 193 bits of the PCM24 side. The channel 0
and channel 16 on the backplane side are the G.704 Timeslot 0 and 16 channels and are not mapped.
Frame #
T1 T1DM Framing
T1 G.802 Mode
channel 16, bit 1
Channel#, Bit#
15
16
17
18
19
20
21
22
23
24
1(bit 6 to 0)-15
1,bit 7(MSB)
DSTi/DSTo
17-25
16
0
Table 10 - G.802 ST-BUS to PCM24 Mapping (T1)
FPS
0
1
1
Table 9 - ESF Superframe Structure (T1)
FDL
PCM24 bits
Not mapped
Not mapped
120 to 192
X
X
X
X
X
119 bits
193 bit
S-bit
CRC
CB5
CB6
Timeslot 16
Timeslot 0
Function
Signaling
last bit
S-bit
C
D
MT9072
47
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