MT9072 Zarlink Semiconductor, Inc., MT9072 Datasheet - Page 179

• Manufacturer Part Number: MT9072
• Description: Octal T1-E1-J1 Framer
• Manufacturer: Zarlink Semiconductor, Inc.

Advance Information
16.2.4
Tables 158 to 172 describe the bit functions of each of the Master Status Registers in the MT9072 in E1 mode.
Each register is repeated for each of the 8 framers. Framer 0 is addressed with Y=0, Framer 1 with Y=1,
Framer 2 with Y=2 and so on up to Framer 7 with Y=7 (where Y represents the 4 most significant address bits
(MSB) A11-A8).
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
MSYNC Receive Multiframe Alignment. If zero, indicates the received PCM30 link signaling
BSYNC
CSYNC Receive CRC-4 Synchronization. If zero, indicates the received PCM30 link CRC-4
RCRC0
RCRC1
RSLPD
Name
RFAIL
RSLP
CEFS
REB1
Master Status Registers (Y10 - Y1A) Bit Functions
RED
#
#
Table 158 - Synchronization & CRC-4 Remote Status (R Address Y10) (E1)
not used.
Receive Slip. This bit changes state when a receive controlled frame slip has occurred.
Receive Slip Direction. If one, indicates that the last received frame slip (RSLP toggled of
register Y10) resulted in a repeated frame. This would occur if the system clock (CKi/2) was
faster than the network clock (EXCLi). If zero, indicates that the last received frame slip (RSLP)
resulted in a lost frame. This would occur if the system clock (CKi/2) was slower than the
network clock (EXCLi). Updated on an RSLP occurrence basis.
Receive Basic Frame Alignment. If zero, indicates the received PCM30 link basic frame
alignment pattern (x0011011 in timeslot 0 of alternate frames) is acquired; if one, the basic
frame alignment pattern is lost or not acquired.
multiframe alignment signal (0000xxxx in timeslot 16 of every16th frame) is acquired; if one, the
signaling multiframe alignment signal is lost or not acquired.
multiframe alignment pattern (001011xx in timeslot 0, in bit position 1 of 16 alternate frames) is
acquired; if one, the CRC-4 multiframe alignment pattern is lost or not acquired.
RED Alarm. If one, indicates that basic frame alignment (BSYNC of register address Y10) has
been lost for at least 100 msec. This bit is cleared (zero) when basic frame alignment is
acquired.
Consecutively Errored Frame Alignment Signal. If one, the last two frame alignment signals
(FAS=0011011) were received in error. If zero, at least one of the last two frame alignment
signals were received without error. A non-errored FAS would result in the RFA status bits
(register address Y13) set as follows, RFA2=0, RFA3=0, RFA4=1, RFA5=1, RFA6=0, RFA7=1,
RFA8=1
not used.
Remote CRC-4 and RAI T10. If one, the received A bits were one and the received E bits were
zero (RCRCR register address Y10) continuously for more than 10ms. See I.431 section
3.4.1.2 on RAI and continuous CRC error information.
Remote CRC-4 and RAI T450. If one, the received A bits were one and the received E bits
were zero (RCRCR register address Y10) continuously for more than 10ms but less than
450ms. See I.431 section 3.4.1.2 on RAI and continuous CRC error information.
Remote CRC-4 Multiframe Generator/Detector Failure. If one, each of the previous five
seconds have an E-bit (E1 + E2) of error count of greater than 989 (E-bit counter 3DD hex or 11
1101 1101 address Y17), and for this same period the receive RAI bit (register addressY12 and
Y13) was zero (no remote alarm), and for the same period the BSYNC bit (register address
Y10) was equal to zero (basic frame alignment has been maintained). If zero, indicates normal
operation.
Receive E1 Bit Status. Indicates the status of the bit (E1) received on the PCM30 link in bit
position 1 of timeslot 0 in non-frame alignment signal (NFAS) frame 13. If zero, the remote end
calculated a CRC-4 error in its received sub-multiframe one. If one, no error was calculated.
Functional Description
MT9072
179