MT9072 Zarlink Semiconductor, Inc., MT9072 Datasheet - Page 140
MT9072
Manufacturer Part Number
MT9072
Description
Octal T1-E1-J1 Framer
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet
1.MT9072.pdf
(278 pages)
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MT9072
16.1.7
Tables 112 to 114 provide the per timeslot control for signaling and Per Channel Control. The reset values of
Per channel Transmit signaling and Receive signaling bits mcan be 1 or 0.
140
15-4
Bit
3
2
1
0
Per Channel Control and Data (Y50 - YAF) Bit Functions
Name
TB(n)
TC(n)
TD(n)
TA(n)
#
not used.
Transmit Signaling Bits A for Channel n. Where signaling is enabled, these bits are
transmitted in bit position 8 of the 6th DS1 frame (within the 12 frame superframe structure for
D4 superframes and the 24 frame structure for ESF superframes). This data is obtained from
the CSTi interface but can be overwritten via the Micro port for trunk conditioning applications.
If the MPST bit in the corresponding per timeslot control is not set, this value will be constantly
overwritten by the CSTi stream.
Transmit Signaling Bits B for Channel n. Where signaling is enabled, these bits are
transmitted in bit position 8 of the 12th DS1 frame (within the 12 frame superframe structure
for D4 superframes and the 24 frame structure for ESF superframes).This data is obtained
from the CSTi interface but can be overwritten via the Micro port for trunk conditioning
applications. If the MPST bit in the corresponding per timeslot control is not set, this value will
be constantly overwritten by the CSTi stream.
Transmit Signaling Bits C for Channel n. Where signaling is enabled, these bits are
transmitted in bit position 8 of the 18th DS1 frame within the 24 frame structure for ESF
superframes. In D4 mode these bits are unused. This data is obtained from the CSTi interface
but can be overwritten via the Micro port for trunk conditioning applications. If the MPST bit in
the corresponding per timeslot control is not set, this value will be constantly overwritten by
the CSTi stream.
Transmit Signaling Bits D for Channel n. Where signaling is enabled, these bits are
transmitted in bit position 8 of the 24th DS1 frame within the 24 frame structure for ESF
superframes. In D4 mode these bits are unused.This data is obtained from the CSTi interface
but can be overwritten via the Micro port for trunk conditioning applications. If the MPST bit in
the corresponding per timeslot control is not set, this value will be constantly overwritten by
the CSTi stream.
Table 113 - Per Channel Transmit Signaling Y50-Y67 (T1)
Functional Description
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