MT9072 Zarlink Semiconductor, Inc., MT9072 Datasheet - Page 203

• Manufacturer Part Number: MT9072
• Description: Octal T1-E1-J1 Framer
• Manufacturer: Zarlink Semiconductor, Inc.

Advance Information
Table 187 - Sync (Sync, CRC-4 Remote, Alarms, MAS and Phase) Interrupt Mask Register (Address
Table 188 - Counter (Counter Indication and Counter Overflow) Interrupt Mask Register (Address
Bit
Bit
15
14
13
12
10
11
3
2
1
0
MSYNCM
CSYNCM
BSYNCM
RFAILM
BEOM
SLOM
FEOM
Name
Name
BEIM
FEIM
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
(0)
#
Remote CRC-4 Multiframe Generator/Detector Failure Mask. This is the mask bit for the
RFAILI interrupt status bit in the Sync (Sync, CRC-4 Remote, Alarms, MAS and Phase)
Interrupt Status Register (address Y34). If this mask bit is one, the corresponding interrupt bit
will remain inactive. If this mask bit is zero, the corresponding interrupt bit will function
normally.
Receive CRC-4 Synchronization Mask. This is the mask bit for the CSYNCI interrupt status
bit in the Sync (Sync, CRC-4 Remote, Alarms, MAS and Phase) Interrupt Status Register
(address Y34). If this mask bit is one, the corresponding interrupt bit will remain inactive. If this
mask bit is zero, the corresponding interrupt bit will function normally.
Receive Multiframe Alignment Mask. This is the mask bit for the MSYNCI interrupt status
bit in the Sync (Sync, CRC-4 Remote, Alarms, MAS and Phase) Interrupt Status Register
(address Y34). If this mask bit is one, the corresponding interrupt bit will remain inactive. If this
mask bit is zero, the corresponding interrupt bit will function normally.
Receive Basic Frame Alignment Mask. This is the mask bit for the BSYNCI interrupt status
bit in the Sync (Sync, CRC-4 Remote, Alarms, MAS and Phase) Interrupt Status Register
(address Y34). If this mask bit is one, the corresponding interrupt bit will remain inactive. If this
mask bit is zero, the corresponding interrupt bit will function normally.
not used.
Loss of Sync Counter Overflow Mask. This is the mask bit for the SLOI interrupt status bit
in the Counter (Counter Indication and Counter Overflow) Interrupt Status Register (address
Y35). If this mask bit is one, the corresponding interrupt bit will remain inactive. If this mask bit
is zero, the corresponding interrupt bit will function normally.
Frame Alignment Signal (FAS) Error Counter Overflow Mask. This is the mask bit for the
FEOI interrupt status bit in the Counter (Counter Indication and Counter Overflow) Interrupt
Status Register (address Y35). If this mask bit is one, the corresponding interrupt bit will
remain inactive. If this mask bit is zero, the corresponding interrupt bit will function normally.
Frame Alignment Signal (FAS) Error Counter Indication Mask. This is the mask bit for the
FEII interrupt status bit in the Counter (Counter Indication and Counter Overflow) Interrupt
Status Register (address Y35). If this mask bit is one, the corresponding interrupt bit will
remain inactive. If this mask bit is zero, the corresponding interrupt bit will function normally.
Frame Alignment Signal (FAS) Bit Error Counter Overflow Mask. This is the mask bit for
the BEOI interrupt status bit in the Counter (Counter Indication and Counter Overflow)
Interrupt Status Register (address Y35). If this mask bit is one, the corresponding interrupt bit
will remain inactive. If this mask bit is zero, the corresponding interrupt bit will function
normally.
Frame Alignment Signal (FAS) Bit Error Counter Indication Mask. This is the mask bit for
the BEII interrupt status bit in the Counter (Counter Indication and Counter Overflow) Interrupt
Status Register (address Y35). If this mask bit is one, the corresponding interrupt bit will
remain inactive. If this mask bit is zero, the corresponding interrupt bit will function normally.
Y44) (E1)
Y45) (E1)
Functional Description
Functional Description
MT9072
203