MT9072 Zarlink Semiconductor, Inc., MT9072 Datasheet - Page 80

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MT9072

Manufacturer Part Number
MT9072
Description
Octal T1-E1-J1 Framer
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet

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MT9072
c) Local and Remote Timeslot Loopback. Remote timeslot loopback control bit RTSL = 0 normal; RTSL = 1
activate (Register Y90-YA7) will loop around transmit ST-BUS timeslots to the DSTo stream. Local timeslot
loopback bits LTSL = 0 normal; LTSL = 1 activate(Register Y90-YA7), will loop around receive PCM24 timeslots
towards the remote PCM24 end.
d) Framer Remote loopback - Internally connects RPOS and RNEG of one framer to TPOS and TNEG
respectively of one of the other integrated framers.
Bit RLBK01, RLBK23, RLBK45, RLBK67 = 0 normal; = 1 activate.
8Mbit/s mode:
Bit RLBK8 = 0 normal; = 1 activate.
e) Framer ST-BUS loopback(Register 904) - Internally connects DSTi of one framer to DSTo of one of the
other integrated framers.
Bit SLBK01, SLBK23, SLBK45, SLBK67 = 0 normal; = 1 activate.
8Mbit/s mode:
Bit SLBK8 = 0 normal; = 1 activate.
80
System
System
System
PCM24
PCM24
DSTo[0]
DSTi[0]
DSTi
DSTo
Rx
Tx
Rx
Tx
DSTo
DSTi
MT9072 Framer 0,2,4,6
MT9072 Framer 0-3
MT9072 Framer 0,2,4,6
MT9072 Framer 0-3
MT9072
Tx
Rx
Tx
Rx
DSTo
DSTi
DSTi[0]
DSTo[0]
Tx
Rx
System
System
PCM24
PCM24
PCM24
DSTi[4]
DSTo[4]
DSTi
DSTo
Rx
Rx
Tx
Tx
MT9072 Framer 1,3,5,7
MT9072 Framer 1,3,5,7
MT9072 Framer 4-7
MT9072 Framer 4-7
DSTo
DSTi
Tx
Tx
DSTo[4]
DSTi[4]
Rx
Rx
PCM24
PCM24
System
Advance Information
System

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