OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 384

• Manufacturer Part Number: OM13013,598
• Description: BOARD DEMO IAR LPC1227 JLINKLITE
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of OM13013,598

• Design Resources: LPC122x-SK Brd Schematic
• Processor To Be Evaluated: LPC1227
• Processor Series: LPC122x
• Data Bus Width: 32 bit
• Interface Type: UART, SSP, SPI, I2C
• Cpu Core: ARM Cortex-M0
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6885

NXP Semiconductors
UM10441
User manual
25.4.3.6.1 The condition flags
25.4.3.6.2 Condition code suffixes
On the Cortex-M0 processor, conditional execution is available by using conditional
branches.
This section describes:
The APSR contains the following condition flags:
N — Set to 1 when the result of the operation was negative, cleared to 0 otherwise.
Z — Set to 1 when the result of the operation was zero, cleared to 0 otherwise.
C — Set to 1 when the operation resulted in a carry, cleared to 0 otherwise.
V — Set to 1 when the operation caused overflow, cleared to 0 otherwise.
For more information about the APSR see
A carry occurs:
Overflow occurs when the sign of the result, in bit[31], does not match the sign of the
result had the operation been performed at infinite precision, for example:
The Compare operations are identical to subtracting, for CMP, or adding, for CMN, except
that the result is discarded. See the instruction descriptions for more information.
Conditional branch is shown in syntax descriptions as B{cond}. A branch instruction with a
condition code is only taken if the condition code flags in the APSR meet the specified
condition, otherwise the branch instruction is ignored. shows the condition codes to use.
Table 366
and V flags.
Table 366. Condition code suffixes
Suffix
EQ
NE
CS or HS
CC or LO
MI
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•
•
•
•
•
•
•
•
Section 25.4.3.6.1 “The condition flags”
Section 25.4.3.6.2 “Condition code
if the result of an addition is greater than or equal to 2
if the result of a subtraction is positive or zero
as the result of a shift or rotate instruction.
if adding two negative values results in a positive value
if adding two positive values results in a negative value
if subtracting a positive value from a negative value generates a positive value
if subtracting a negative value from a positive value generates a negative value.
also shows the relationship between condition code suffixes and the N, Z, C,
Flags
Z = 1
Z = 0
C = 1
C = 0
N = 1
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 February 2011
Meaning
Higher or same, unsigned
Lower, unsigned
Negative
Equal, last flag setting result was zero
Not equal, last flag setting result was non-zero
Chapter 25: LPC122x Appendix ARM Cortex-M0
suffixes”.
Section
25–25.3.1.3.5.
32
UM10441
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