OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 336

• Manufacturer Part Number: OM13013,598
• Description: BOARD DEMO IAR LPC1227 JLINKLITE
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of OM13013,598

• Design Resources: LPC122x-SK Brd Schematic
• Processor To Be Evaluated: LPC1227
• Processor Series: LPC122x
• Data Bus Width: 32 bit
• Interface Type: UART, SSP, SPI, I2C
• Cpu Core: ARM Cortex-M0
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6885

NXP Semiconductors
UM10441
User manual
21.6.16 Channel priority clear register
21.6.17 Bus error clear register
Table 335. Channel priority set register (CHNL_PRIORITY_SET, address 0x4004 C038) bit
This register is a write-only register and configures a DMA channel c (c = 0 to 20) to use
the default priority level. Writing to a bit where a DMA channel is not implemented has no
effect.
Table 336. Channel priority clear register (CHNL_PRIORITY_CLR, address 0x4004 C03C) bit
This register is a read/write register and returns the status of dma_err or sets the dma_err
signal LOW.
Remark: If dma_err is deasserted at the same time as an error occurs on the AHB-Lite
bus, then the error condition takes precedence and dma_err remains asserted.
Bit
20:0
31:21 -
Bit
20:0
31:21 -
Symbol
CHNL_PRIORITY
_CLR
Symbol
CHNL_PRIORITY
_SET
description
description
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 February 2011
Chapter 21: LPC122x General purpose micro DMA controller
Description
Returns the channel priority mask status, or sets the channel
priority to high.
Read as:
Bit [c] = 0: DMA channel c is using the default priority level.
Bit [c] = 1: DMA channel c is using a high priority level.
Write as:
Bit [c] = 0: No effect. Use the CHNL_PRIORITY_CLR
Register to set channel c to the default priority level.
Bit [c] = 1: Channel c uses the high priority level.
Reserved.
Description
Set the appropriate bit to select the default priority level for
the specified DMA channel.
Write as:
Bit [c] = 0: No effect. Use the CHNL_PRIORITY_SET
Register to set channel c to the high priority level.
Bit [c] = 1: Channel c uses the default priority level.
Reserved.
UM10441
© NXP B.V. 2011. All rights reserved.
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Reset
value
0x0
-
Reset
value
-
-