OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 371

• Manufacturer Part Number: OM13013,598
• Description: BOARD DEMO IAR LPC1227 JLINKLITE
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of OM13013,598

• Design Resources: LPC122x-SK Brd Schematic
• Processor To Be Evaluated: LPC1227
• Processor Series: LPC122x
• Data Bus Width: 32 bit
• Interface Type: UART, SSP, SPI, I2C
• Cpu Core: ARM Cortex-M0
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6885

NXP Semiconductors
UM10441
User manual
25.3.3.5 Exception priorities
The vector table is fixed at address 0x00000000.
As
If software does not configure any priorities, then all exceptions with a configurable priority
have a priority of 0. For information about configuring exception priorities see
Configurable priority values are in the range 0-192, in steps of 64. The Reset, HardFault,
and NMI exceptions, with fixed negative priority values, always have higher priority than
any other exception.
Fig 66. Vector table
•
•
•
•
Table 25–361
a lower priority value indicating a higher priority
configurable priorities for all exceptions except Reset, HardFault, and NMI.
Section 25–25.5.3.7
Section
25–25.5.2.6.
All information provided in this document is subject to legal disclaimers.
Exception number
shows, all exceptions have an associated priority, with:
Rev. 1 — 15 February 2011
47
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
.
.
.
IRQ number
-13
-14
31
-1
-2
-5
2
1
0
Chapter 25: LPC122x Appendix ARM Cortex-M0
Initial SP value
HardFault
Reserved
Reserved
PendSV
SysTick
SVCall
Vector
IRQ31
Reset
IRQ2
IRQ1
IRQ0
NMI
.
.
.
0xBC
Offset
0x3C
0x2C
0x0C
0x48
0x44
0x40
0x38
0x10
0x08
0x04
0x00
.
.
.
UM10441
© NXP B.V. 2011. All rights reserved.
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