OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 139

• Manufacturer Part Number: OM13013,598
• Description: BOARD DEMO IAR LPC1227 JLINKLITE
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of OM13013,598

• Design Resources: LPC122x-SK Brd Schematic
• Processor To Be Evaluated: LPC1227
• Processor Series: LPC122x
• Data Bus Width: 32 bit
• Interface Type: UART, SSP, SPI, I2C
• Cpu Core: ARM Cortex-M0
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6885

NXP Semiconductors
UM10441
User manual
9.5.4 UART Interrupt Enable Register (when DLAB = 0)
Table 140. UART Divisor Latch LSB Register (DLL - address 0x4000 8000 when DLAB = 1) bit
Table 141. UART Divisor Latch MSB Register (DLM - address 0x4000 8004 when DLAB = 1)
The IER is used to enable the four UART interrupt sources.
Table 142. UART Interrupt Enable Register (IER - address 0x4000 8004 when DLAB = 0) bit
Bit
7:0
31:8 -
Bit
7:0
31:8 -
Bit
0
1
2
3
6:4
7
8
9
31:10 -
Symbol
DLLSB
Symbol
DLMSB
Symbol
RBRIE
THREIE
RXLIE
-
-
-
ABEOINTEN
ABTOINTEN
description
bit description
description
All information provided in this document is subject to legal disclaimers.
Description
The UART Divisor Latch LSB Register, along with the DLM
register, determines the baud rate of the UART.
Reserved
Description
The UART Divisor Latch MSB Register, along with the DLL
register, determines the baud rate of the UART.
Reserved
Value
Rev. 1 — 15 February 2011
0
1
0
1
0
1
0
1
0
1
-
-
Description
RBR Interrupt Enable. Enables the Receive Data Available
interrupt for UART. It also controls the Character Receive
Time-out interrupt.
Disable the RDA interrupts.
Enable the RDA interrupts.
THRE Interrupt Enable. Enables the THRE interrupt for
UART. The status of this interrupt can be read from LSR[5].
Disable the THRE interrupts.
Enable the THRE interrupts.
RX Line Interrupt Enable. Enables the UART RX line
status interrupts. The status of this interrupt can be read
from LSR[4:1].
Disable the RX line status interrupts.
Enable the RX line status interrupts.
Reserved
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
Reserved
Enables the end of auto-baud interrupt.
Disable end of auto-baud Interrupt.
Enable end of auto-baud Interrupt.
Enables the auto-baud time-out interrupt.
Disable auto-baud time-out Interrupt.
Enable auto-baud time-out Interrupt.
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
Chapter 9: LPC122x UART0 with modem control
UM10441
© NXP B.V. 2011. All rights reserved.
Reset value
0x01
-
Reset value
0x00
-
139 of 442
Reset
value
0
0
0
-
NA
0
0
0
NA