OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 355
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OM13013,598
Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Specifications of OM13013,598
Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
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NXP Semiconductors
UM10441
User manual
24.5.2 Debug connections
During a debugging session, the System Tick Timer is automatically stopped whenever
the CPU is stopped. Other peripherals are not affected.
For debugging purposes, it is useful to provide access to the ISP entry pin PIO0_1. This
pin can be used to recover the part from configurations which would disable the SWD port
such as improper PLL configuration or reconfiguration of SWD pins as ADC inputs, entry
into Deep power-down mode out of reset, etc. This pin can be used for other functions
such as GPIO, but it should not be held low on power-up or reset.
Fig 59. Connecting the SWD pins to a standard SWD connector
The VTREF pin on the SWD connector enables the debug connector to match the target voltage.
SWDIO
SWCLK
nSRST
VTREF
GND
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 February 2011
Gnd
VDD
Chapter 24: LPC122x Serial Wire Debug (SWD)
ISP entry
PIO0_12
SWDIO
SWCLK
RESET
UM10441
© NXP B.V. 2011. All rights reserved.
LPC122x
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