OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 276

• Manufacturer Part Number: OM13013,598
• Description: BOARD DEMO IAR LPC1227 JLINKLITE
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of OM13013,598

• Design Resources: LPC122x-SK Brd Schematic
• Processor To Be Evaluated: LPC1227
• Processor Series: LPC122x
• Data Bus Width: 32 bit
• Interface Type: UART, SSP, SPI, I2C
• Cpu Core: ARM Cortex-M0
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6885

NXP Semiconductors
UM10441
User manual
16.4.5 RTC interrupt control set/clear register
16.4.6 RTC interrupt status register
16.4.7 RTC masked interrupt status register
Table 258. RTC control register (CR - address 0x4005 000C) bit description
RTIMSC is a R/W register and controls the masking of the interrupt generated by the
RTC. Writing sets or clears the mask. Reading this register returns the current value of the
mask on the RTC interrupt.
Table 259. RTC interrupt mask register (ICSC - address 0x4005 0010) bit description
This register is a RO register. Reading this register gives the current raw status value of
the corresponding interrupt prior to masking. A write has no effect.
Table 260. RTC interrupt status register (RIS - address 0x4005 0014) bit description
This register is a RO register. Reading this register gives the current masked status value
of the corresponding interrupt. A write has no effect.
Table 261. RTC masked interrupt status register (MIS - address 0x4005 0018) bit description
Bit
0
31:1
Bit
0
31:1
Bit
0
31:1
Bit
0
31:1
Symbol
RTCSTART
-
Symbol
RTCIC
-
Symbol
RTCRIS
-
Symbol
RTCMIS
-
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Value
0
1
Value
0
1
Description
Raw interrupt event flag register. A read returns the state
of the raw interrupt event flag.
Reserved. Read as zero.
Description
Masked interrupt register status. A read returns the
masked interrupt status as controlled by the ICR register.
Reserved. Read as zero.
Rev. 1 — 15 February 2011
Description
Interrupt control register. A read returns the current value
of the RTC control register.
Writing 0 masks the interrupt.
Writing 1 enables the interrupt.
Reserved. Read as zero. Do not modify these bits.
Description
Enables the RTC. Once the RTC is enabled through
this bit, any writes to this bit have no effect on the RTC
until a power on reset (POR).
RTC disabled.
RTC enabled.
written as zeros.
Reserved. Read undefined. These bits should be
Chapter 16: LPC122x Real-Time Clock (RTC)
UM10441
© NXP B.V. 2011. All rights reserved.
Reset value
0x0
0x0
Reset value
0x0
0x0
Reset
value
0x0
-
Reset
value
0x0
0x0
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