OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 348

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OM13013,598

Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Datasheets

Specifications of OM13013,598

Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
22.1 How to read this chapter
22.2 Introduction
22.3 Features
UM10441
User manual
The CRC engine is available on all LPC122x parts.
The Cyclic Redundancy Check (CRC) generator with programmable polynomial settings
supports several CRC standards commonly used. To save system power and bus
bandwidth, the CRC engine supports DMA transfers in addition to software PIO
operations using the CPU.
UM10441
Chapter 22: LPC122x CRC engine
Rev. 1 — 15 February 2011
Supports three common polynomials CRC-CCITT, CRC-16, and CRC-32.
– CRC-CCITT: x
– CRC-16: x
– CRC-32: x
Bit order reverse and 1’s complement programmable setting for input data and CRC
sum.
Programmable seed number setting.
Supports CPU PIO or DMA back-to-back transfer.
Accept any size of data width per write: 8, 16 or 32-bit.
– 8-bit write: 1-cycle operation
– 16-bit write: 2-cycle operation (8-bit x 2-cycle)
– 32-bit write: 4-cycle operation (8-bit x 4-cycle)
All information provided in this document is subject to legal disclaimers.
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© NXP B.V. 2011. All rights reserved.
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