OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 208

• Manufacturer Part Number: OM13013,598
• Description: BOARD DEMO IAR LPC1227 JLINKLITE
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of OM13013,598

• Design Resources: LPC122x-SK Brd Schematic
• Processor To Be Evaluated: LPC1227
• Processor Series: LPC122x
• Data Bus Width: 32 bit
• Interface Type: UART, SSP, SPI, I2C
• Cpu Core: ARM Cortex-M0
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6885

NXP Semiconductors
Table 200. Master Receiver mode
UM10441
User manual
STAT
Status
Code
0x08
0x10
0x38
0x40
0x48
0x50
0x58
Status of the
I
hardware
A START condition
has been transmitted.
A repeated START
condition has been
transmitted.
Arbitration lost in
NOT ACK bit.
SLA+R has been
transmitted; ACK has
been received.
SLA+R has been
transmitted; NOT
ACK has been
received.
Data byte has been
received; ACK has
been returned.
Data byte has been
received; NOT ACK
has been returned.
2
C-bus and
Application software response
To/From DAT
Load SLA+R
Load SLA+R or
Load SLA+W
No DAT action or
No DAT action
No DAT action or
No DAT action
No DAT action or
No DAT action or
No DAT action
Read data byte or
Read data byte
Read data byte or
Read data byte or
Read data byte
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 February 2011
To CON
STA STO SI
X
X
X
0
1
0
0
1
0
1
0
0
1
0
1
0
0
0
0
0
0
0
0
1
1
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
X
1
1
X
X
AA
X
X
X
X
0
X
X
X
0
X
Chapter 11: LPC122x I2C-bus controller
Next action taken by I
SLA+R will be transmitted; ACK bit will be
received.
As above.
SLA+W will be transmitted; the I
will be switched to MST/TRX mode.
I
enter a slave mode.
A START condition will be transmitted
when the bus becomes free.
Data byte will be received; NOT ACK bit
will be returned.
Data byte will be received; ACK bit will be
returned.
Repeated START condition will be
transmitted.
STOP condition will be transmitted; STO
flag will be reset.
STOP condition followed by a START
condition will be transmitted; STO flag will
be reset.
Data byte will be received; NOT ACK bit
will be returned.
Data byte will be received; ACK bit will be
returned.
Repeated START condition will be
transmitted.
STOP condition will be transmitted; STO
flag will be reset.
STOP condition followed by a START
condition will be transmitted; STO flag will
be reset.
2
C-bus will be released; the I
UM10441
© NXP B.V. 2011. All rights reserved.
2
C hardware
2
C block will
2
C block
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