OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 217
OM13013,598
Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Specifications of OM13013,598
Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
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UM10441
User manual
11.11.5.2 Master States
11.11.5.3 State: 0x08
11.11.5.4 State: 0x10
11.11.6.1 State: 0x18
11.11.6 Master Transmitter states
State 08 and State 10 are for both Master Transmit and Master Receive modes. The R/W
bit decides whether the next state is within Master Transmit mode or Master Receive
mode.
A START condition has been transmitted. The Slave Address + R/W bit will be
transmitted, an ACK bit will be received.
A Repeated START condition has been transmitted. The Slave Address + R/W bit will be
transmitted, an ACK bit will be received.
Previous state was State 8 or State 10, Slave Address + Write has been transmitted, ACK
has been received. The first data byte will be transmitted, an ACK bit will be received.
2. Write 0x08 to CONCLR to clear the SI flag.
3. Exit
1. Write Slave Address with R/W bit to DAT.
2. Write 0x04 to CONSET to set the AA bit.
3. Write 0x08 to CONCLR to clear the SI flag.
4. Set up Master Transmit mode data buffer.
5. Set up Master Receive mode data buffer.
6. Initialize Master data counter.
7. Exit
1. Write Slave Address with R/W bit to DAT.
2. Write 0x04 to CONSET to set the AA bit.
3. Write 0x08 to CONCLR to clear the SI flag.
4. Set up Master Transmit mode data buffer.
5. Set up Master Receive mode data buffer.
6. Initialize Master data counter.
7. Exit
1. Load DAT with first data byte from Master Transmit buffer.
2. Write 0x04 to CONSET to set the AA bit.
3. Write 0x08 to CONCLR to clear the SI flag.
4. Increment Master Transmit buffer pointer.
5. Exit
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 February 2011
Chapter 11: LPC122x I2C-bus controller
UM10441
© NXP B.V. 2011. All rights reserved.
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