OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 224

• Manufacturer Part Number: OM13013,598
• Description: BOARD DEMO IAR LPC1227 JLINKLITE
• Manufacturer: NXP Semiconductors
• Series: -r

Specifications of OM13013,598

• Design Resources: LPC122x-SK Brd Schematic
• Processor To Be Evaluated: LPC1227
• Processor Series: LPC122x
• Data Bus Width: 32 bit
• Interface Type: UART, SSP, SPI, I2C
• Cpu Core: ARM Cortex-M0
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-6885

NXP Semiconductors
12.5 Pin description
12.6 Register description
UM10441
User manual
Table 204. SSP pin descriptions
The register addresses of the SSP controller are shown in
Pin
Name
SCK
SSEL
MISO
MOSI
Type
I/O
I/O
I/O
I/O
All information provided in this document is subject to legal disclaimers.
Interface pin
name/function
SPI
SCK
SSEL FS
MISO DR(M)
MOSI DX(M)
Rev. 1 — 15 February 2011
SSI
CLK
DX(S)
DR(S)
Microwire
SK
CS
SI(M)
SO(S)
SO(M)
SI(S)
Pin Description
Serial Clock. SCK/CLK/SK is a clock signal used
to synchronize the transfer of data. It is driven by
the master and received by the slave. When SPI
interface is used, the clock is programmable to be
active-high or active-low, otherwise it is always
active-high. SCK only switches during a data
transfer. Any other time, the SSP interface either
holds it in its inactive state or does not drive it
(leaves it in high-impedance state).
Frame Sync/Slave Select. When the SSP
interface is a bus master, it drives this signal to an
active state before the start of serial data and then
releases it to an inactive state after the data has
been sent.The active state of this signal can be
high or low depending upon the selected bus and
mode. When the SSP interface is a bus slave, this
signal qualifies the presence of data from the
Master according to the protocol in use.
When there is just one bus master and one bus
slave, the Frame Sync or Slave Select signal from
the Master can be connected directly to the slave’s
corresponding input. When there is more than one
slave on the bus, further qualification of their Frame
Select/Slave Select inputs will typically be
necessary to prevent more than one slave from
responding to a transfer.
Master In Slave Out. The MISO signal transfers
serial data from the slave to the master. When the
SSP is a slave, serial data is output on this signal.
When the SSP is a master, it clocks in serial data
from this signal. When the SSP is a slave and is not
selected by FS/SSEL, it does not drive this signal
(leaves it in high-impedance state).
Master Out Slave In. The MOSI signal transfers
serial data from the master to the slave. When the
SSP is a master, it outputs serial data on this
signal. When the SSP is a slave, it clocks in serial
data from this signal.
Chapter 12: LPC122x SSP controller
Table
205.
UM10441
© NXP B.V. 2011. All rights reserved.
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