OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 324
OM13013,598
Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Specifications of OM13013,598
Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
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20.9 Serial Wire Debug (SWD) flash programming interface
UM10441
User manual
20.8.12 IAP Status Codes
Table 318. IAP Status Codes Summary
Debug tools can write parts of the flash image to RAM and then execute the IAP call
"Copy RAM to flash" repeatedly with proper offset.
Status
Code
0
1
2
3
4
5
6
7
8
9
10
11
Mnemonic
CMD_SUCCESS
INVALID_COMMAND
SRC_ADDR_ERROR
DST_ADDR_ERROR
SRC_ADDR_NOT_MAPPED
DST_ADDR_NOT_MAPPED
COUNT_ERROR
INVALID_SECTOR
SECTOR_NOT_BLANK
SECTOR_NOT_PREPARED_
FOR_WRITE_OPERATION
COMPARE_ERROR
BUSY
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 February 2011
Description
Command is executed successfully.
Invalid command.
Source address is not on a word boundary.
Destination address is not on a correct boundary.
Invalid information page address.
Source address is not mapped in the memory map.
Count value is taken in to consideration where
applicable.
Destination address is not mapped in the memory
map. Count value is taken in to consideration where
applicable.
Byte count is not multiple of 4 or is not a permitted
value.
Sector number or page number is invalid.
Sector is not blank.
Command to prepare sector for write operation was
not executed.
Source and destination data is not same.
Flash programming hardware interface is busy.
Chapter 20: LPC122x Flash ISP/IAP
UM10441
© NXP B.V. 2011. All rights reserved.
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