OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 127

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OM13013,598

Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Datasheets

Specifications of OM13013,598

Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
NXP Semiconductors
Table 118. LPC122x pin description
[1]
[2]
[3]
[4]
[5]
[6]
[7]
7.3 Pin multiplexing
UM10441
User manual
Symbol
V
V
V
V
DD(IO)
DD(3V3)
SSIO
SS
Pin state at reset for default function: I = Input; O = Output; PU = internal pull-up enabled; IA = inactive, no pull-up/down enabled.
3.3 V tolerant, digital I/O pin; default: pull-up enabled, no hysteresis.
I
3.3 V tolerant, digital I/O pin with RESET function; default: pull-up enabled, no hysteresis. An external pull-up resistor is required on this
pin for the Deep power-down mode.
3.3 V tolerant, digital I/O pin with analog function; default: pull-up enabled, no hysteresis.
3.3 V tolerant, digital I/O pin with analog function and WAKEUP function; default: pull-up enabled, no hysteresis.
3.3 V tolerant, high-drive digital I/O pin; default: pull-up enabled, no hysteresis.
2
C-bus pins; 5 V tolerant; open-drain; default: no pull-up/pull-down; no hysteresis.
To enable a peripheral function on a pin, find the corresponding port pin, or select a port
pin if the function is multiplexed, and program the port pin’s IOCONFIG register to enable
that function. The primary SWD functions and RESET are the default functions on their
pins after reset, all other digital pins default to GPIO.
Table 119. Pin multiplexing
Peripheral
Analog comparators
47 63
44 56
48 64
43 55
Start
logic
input
-
-
-
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…continued
All information provided in this document is subject to legal disclaimers.
Type Reset
I
I
I
I
Rev. 1 — 15 February 2011
state
[1]
-
-
-
-
Function
ROSC
ACMP0_I0
ACMP0_I1
ACMP0_I2
ACMP0_I3
ACMP0_O
ACMP1_I0
ACMP1_I1
ACMP1_I2
ACMP1_I3
ACMP1_O
Description
Input/output supply voltage.
3.3 V supply voltage to the internal regulator and the ADC. Also
used as the ADC reference voltage.
Ground.
Ground.
Type
I/O
I
I
I
I
O
I
I
I
I
O
Chapter 7: LPC122x Pin configuration
Available on ports:
PIO0_29
PIO0_19
PIO0_20
PIO0_21
PIO0_22
PIO0_27
PIO0_23
PIO0_24
PIO0_25
PIO0_26
PIO0_28
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-
-
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-
-
-
-
-
-
-
UM10441
© NXP B.V. 2011. All rights reserved.
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