OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 203
OM13013,598
Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Specifications of OM13013,598
Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
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UM10441
User manual
Fig 23. Format and states in the Master Receiver mode
successful
transmission to
a Slave
transmitter
next transfer
started with a
Repeated Start
condition
Not Acknowledge
received after the
Slave address
arbitration lost in
Slave address or
Acknowledge bit
arbitration lost
and addressed
as Slave
DATA
n
08H
S
A
from Master to Slave
from Slave to Master
any number of data bytes and their associated
Acknowledge bits
this number (contained in I2STA) corresponds to a defined state of
the I
SLA
2
C bus
All information provided in this document is subject to legal disclaimers.
R
MR
Rev. 1 — 15 February 2011
40H
48H
A OR A
68H 78H B0H
A
A
A
38H
P
DATA
other Master
continues
other Master
continues
50H
A
to corresponding
states in Slave
DATA
mode
Chapter 11: LPC122x I2C-bus controller
58H
38H
A
A
10H
P
S
other Master
continues
SLA
mode, entry
to Master
UM10441
transmit
= MT
© NXP B.V. 2011. All rights reserved.
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