OM13013,598 NXP Semiconductors, OM13013,598 Datasheet - Page 309
OM13013,598
Manufacturer Part Number
OM13013,598
Description
BOARD DEMO IAR LPC1227 JLINKLITE
Manufacturer
NXP Semiconductors
Series
-r
Specifications of OM13013,598
Design Resources
LPC122x-SK Brd Schematic
Processor To Be Evaluated
LPC1227
Processor Series
LPC122x
Data Bus Width
32 bit
Interface Type
UART, SSP, SPI, I2C
Cpu Core
ARM Cortex-M0
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3 V to 3.6 V
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-6885
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UM10441
User manual
20.6.1 ISP entry protection
Table 287. Code Read Protection hardware/software interaction
Table 288. ISP commands allowed for different CRP levels
In case one of the CRP modes is enabled and access to the chip is allowed via the ISP, an
unsupported or restricted ISP command will be terminated with return code
CODE_READ_PROTECTION_ENABLED.
In addition to the three CRP modes, the user can prevent the sampling of pin PIO0_12 for
entering ISP mode without enabling CRP and thereby release pin PIO0_12 for other uses.
This is called the NO_ISP mode. The NO_ISP mode can be entered by programming the
pattern 0x4E69 7370 at location 0x0000 02FC.
In NO_ISP mode, the flash can be reprogrammed through the SWD interface. Flash
contents are not protected in this mode.
CRP option
CRP2
CRP2
CRP3
CRP1
CRP2
CRP3
ISP command
Unlock
Set Baud Rate
Echo
Write to RAM
Read Memory
Prepare sector(s) for
write operation
Copy RAM to flash
Go
Erase sector(s)
Blank check sector(s)
Read Part ID
Read Boot code version yes
Compare
ReadUID
User Code
Valid
Yes
Yes
Yes
No
No
No
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 15 February 2011
CRP1
yes
yes
yes
yes; above 0x1000 0300
only
no
yes
yes; not to sector 0
no
yes; sector 0 can only be
erased when all sectors are
erased.
no
yes
no
yes
PIO0_12 pin
at reset
High
Low
x
x
x
x
JTAG enabled LPC122x
No
No
No
No
No
No
CRP2
yes
yes
yes
no
no
yes
no
no
yes; all sectors
only
no
yes
yes
no
yes
Chapter 20: LPC122x Flash ISP/IAP
enters ISP
mode
No
Yes
No
Yes
Yes
Yes
CRP3 (no entry in ISP
mode allowed)
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
UM10441
© NXP B.V. 2011. All rights reserved.
partial flash
update in ISP
mode
NA
No
NA
Yes
No
No
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