MCF5272VF66 Freescale, MCF5272VF66 Datasheet - Page 396
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MCF5272VF66
Manufacturer Part Number
MCF5272VF66
Description
Manufacturer
Freescale
Datasheet
1.MCF5272VF66.pdf
(544 pages)
Specifications of MCF5272VF66
Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Not Compliant
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General Purpose I/O Module
17.2
The port control registers are used to configure all pins that carry signals multiplexed from different
on-chip modules. Each pin is configured with a two-bit field. Pin functions are referred to as
function 0b00–0b11. The function 0 signals corresponding to GPIO ports A and B are immediately
available after reset.
Wherever a signal function includes a GPIO port bit, the function defaults to an input after a reset and can
be read in the corresponding port data register.
Pin functions are generally grouped logically. For example, all UART1 signals are multiplexed with port
B and have the control register function code of 0b01.
There is no port C control register. Port C is enabled when the 16-bit-wide external data bus mode is
selected at reset by the input level on QSPI_DOUT/WSEL. The port D control register is used to configure
pins that have multiple functions (0b01 through 0b11) but no GPIO function.
17-2
0x0080
0x0084
0x0086
0x0088
0x008C
0x008E
0x0094
0x0096
0x0098
MBAR
Offset
Port Control Registers
Do not attempt to program a pin function that is not defined. Where no
function is defined, the function code is labeled ‘Reserved’ and is
considered invalid. Programming any control register field with a reserved
value has an unpredictable effect on the corresponding pin’s operation.
Reserved function codes cannot be reliably read. Attempts to read them
yield undetermined values.
Port C Data Direction Register (PCDDR)
Port B Data Direction Register (PBDDR)
Port A Data Direction Register (PADDR)
[31:24]
MCF5272 ColdFire
Reserved
Reserved
Reserved
Table 17-2. GPIO Port Register Memory Map
®
Integrated Microprocessor User’s Manual, Rev. 3
[23:16]
Port D Control Register (PDCNT)
Port B Control Register (PBCNT)
Port A Control Register (PACNT)
CAUTION
[15:8]
Port C Data Register (PCDAT)
Port B Data Register (PBDAT)
Port A Data Register (PADAT)
Reserved
Reserved
Reserved
Freescale Semiconductor
[7:0]
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