MCF5272VF66 Freescale, MCF5272VF66 Datasheet - Page 328
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MCF5272VF66
Manufacturer Part Number
MCF5272VF66
Description
Manufacturer
Freescale
Datasheet
1.MCF5272VF66.pdf
(544 pages)
Specifications of MCF5272VF66
Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Not Compliant
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Physical Layer Interface Controller (PLIC)
13.5.20 D-Channel Request Register (PDRQR)
All bits in this read/write register are cleared on hardware or software reset.
The PDRQR register contains D-channel control bits for all four ports on the MCF5272.
13-32
15–12
11, 9
10, 8
Bits
7–2
1–0
Reset
Field
Addr
R/W
15
DCNTI
SHDD
Name
DRQ
—
—
—
MCF5272 ColdFire
Reserved, should be cleared.
D-channel shift direction.
0 D-channel data is msb first. The first bit received is assumed to be the most significant bit and is
1 D-channel data is lsb first for the D channel. The first bit received is assumed to be the least
D-channel control ignore. Allows the D-Channel contention function to be ignored.
Reserved, should be cleared.
The value written to these bits is driven onto the DREQ pins associated with port 0 and port 1. When
set, a logic high, 1, is driven on to the corresponding pin.
12
loaded into the msb position of the D-channel receive register for the respective port. SHDD(1)
configures the shift direction for ports 1, 2 and 3, SHDD(0) configures the shift direction for port 0.
significant bit and is loaded into the lsb position of the D-channel receive register for the
respective port.
00 contention active on both ports
01 ignore contention on port 0
10 ignore contention on port 1
11 ignore contention on both ports
Figure 13-32. D-Channel Request Registers (PDRQR)
SHDD(1) DCNTI(1) SHDD(0) DCNTI(0)
11
Table 13-15. PDRQR Field Descriptions
®
Integrated Microprocessor User’s Manual, Rev. 3
10
0000_0000_0000_0000
MBAR + 0x392
9
Read/Write
Description
8
7
—
2
Freescale Semiconductor
1
DRQ
0
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