MCF5272VF66 Freescale, MCF5272VF66 Datasheet - Page 25

• Manufacturer Part Number: MCF5272VF66
• Manufacturer: Freescale

Specifications of MCF5272VF66

• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Not Compliant

Paragraph
Number
17.1 Overview .................................................................................................................................... 17-1
17.2 Port Control Registers ................................................................................................................ 17-2
17.3 Data Direction Registers .......................................................................................................... 17-10
17.4 Port Data Registers .................................................................................................................. 17-11
18.1 Overview .................................................................................................................................... 18-1
18.2 PWM Operation ......................................................................................................................... 18-2
18.3 PWM Programming Model ....................................................................................................... 18-2
19.1 MCF5272 Block Diagram with Signal Interfaces ..................................................................... 19-1
19.2 Signal List .................................................................................................................................. 19-3
19.3 Address Bus (A[22:0]/SDA[13:0]) .......................................................................................... 19-19
19.4 Data Bus (D[31:0]) .................................................................................................................. 19-19
19.5 Chip Selects (CS7/SDCS, CS[6:0]) ......................................................................................... 19-19
19.6 Bus Control Signals ................................................................................................................. 19-20
Freescale Semiconductor
16.5.5 Bus Operation ............................................................................................................... 16-29
16.5.6 Programming ................................................................................................................ 16-30
17.2.1 Port A Control Register (PACNT) .................................................................................. 17-3
17.2.2 Port B Control Register (PBCNT) .................................................................................. 17-5
17.2.3 Port C Control Register .................................................................................................. 17-8
17.2.4 Port D Control Register (PDCNT) ................................................................................. 17-8
17.3.1 Port A Data Direction Register (PADDR) .................................................................... 17-10
17.3.2 Port B Data Direction Register (PBDDR) .................................................................... 17-10
17.3.3 Port C Data Direction Register (PCDDR) .................................................................... 17-11
17.4.1 Port Data Register (PxDAT) ......................................................................................... 17-11
18.3.1 PWM Control Register (PWCRn) .................................................................................. 18-3
18.3.2 PWM Width Register (PWWDn) ................................................................................... 18-4
19.4.1 Dynamic Data Bus Sizing ............................................................................................ 19-19
19.6.1 Output Enable/Read (OE/RD) ...................................................................................... 19-20
16.5.5.1 Read Cycles .................................................................................................... 16-29
16.5.5.2 Write Cycles ................................................................................................... 16-29
16.5.5.3 Interrupt Acknowledge Cycles ....................................................................... 16-29
16.5.6.1 UART Module Initialization Sequence .......................................................... 16-30
MCF5272 ColdFire
Pulse-Width Modulation (PWM) Module
Table of Contents (Continued)
General Purpose I/O Module
®
Signal Descriptions
Integrated Microprocessor User’s Manual, Rev. 3
Chapter 17
Chapter 18
Chapter 19
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