MCF5272VF66 Freescale, MCF5272VF66 Datasheet - Page 218

• Manufacturer Part Number: MCF5272VF66
• Manufacturer: Freescale

Specifications of MCF5272VF66

• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Not Compliant

DMA Controller
10.3.4
The DDAR provides a 32-bit address that the DMA controller drives onto the internal address bus for all
of the channel’s write accesses. The address is altered after each write access according to the addressing
mode.
10.3.5
The DBCR is initially loaded with the number of bytes to be transferred during the DMA. After each
transfer, the DBCR decrements by the number of bytes transferred. DIR[ASC] is set when the byte counter
reaches zero. The user must ensure that the bytes remaining to be transferred and the transfer size are such
that the byte counter decrements to zero or wraps around without setting the ASC flag.
10-6
Reset
Field
Addr
R/W
Reset
Field
Addr
R/W
31
31
DMA Destination Address Register (DDAR)
DMA Byte Count Register (DBCR)
—
MCF5272 ColdFire
Figure 10-4. DMA Destination Address Register (DDAR)
Figure 10-5. DMA Byte Count Register (DBCR)
24 23
0000_0000_0000_0000_0000_0000_0000_0000
0000_0000_0000_0000_0000_0000_0000_0000
®
Integrated Microprocessor User’s Manual, Rev. 3
MBAR + 0x00F0
MBAR + 0x00E8
DESTADR
R/W
R/W
BYTCNT
Freescale Semiconductor
0
0