MCF5272VF66 Freescale, MCF5272VF66 Datasheet - Page 100

• Manufacturer Part Number: MCF5272VF66
• Manufacturer: Freescale

Specifications of MCF5272VF66

• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Not Compliant

Hardware Multiply/Accumulate (MAC) Unit
The MAC unit is tightly coupled to the OEP and features a three-stage execution pipeline. To minimize
silicon costs, the ColdFire MAC is optimized for 16 x 16 multiply instructions. The OEP can issue a
16 x 16 multiply with a 32-bit accumulation and fetch a 32-bit operand in the same cycle. A 32 x 32
multiply with a 32-bit accumulation takes three cycles before the next instruction can be issued.
shows the basic functionality of the ColdFire MAC. A full set of instructions is provided for signed and
unsigned integers plus signed, fixed-point, fractional input operands.
The MAC unit is an extension of the basic multiplier found on most microprocessors. It can perform
operations native to signal processing algorithms in an acceptable number of cycles, given the application
constraints. For example, small digital filters can tolerate some variance in the execution time of the
algorithm; larger, more complicated algorithms such as orthogonal transforms may have more demanding
speed requirements exceeding the scope of any processor architecture and requiring a fully developed DSP
implementation.
The M68000 architecture was not designed for high-speed signal processing, and a large DSP engine
would be excessive in an embedded environment. In striking a middle ground between speed, size, and
functionality, the ColdFire MAC unit is optimized for a small set of operations that involve multiplication
and cumulative additions. Specifically, the multiplier array is optimized for single-cycle, 16 x 16
multiplies producing a 32-bit result, with a possible accumulation cycle following. This is common in a
large portion of signal processing applications. In addition, the ColdFire core architecture has been
modified to allow for an operand fetch in parallel with a multiply, increasing overall performance for
certain DSP operations.
3.1.1
Figure 3-2
These registers are described as follows:
3-2
•
•
•
Accumulator (ACC)—This 32-bit, read/write, general-purpose register is used to accumulate the
results of MAC operations.
Mask register (MASK)—This 16-bit general-purpose register provides an optional address mask
for MAC instructions that fetch operands from memory. It is useful in the implementation of
circular queues in operand memory.
MAC status register (MACSR)—This 8-bit register defines configuration of the MAC unit and
contains indicator flags affected by MAC instructions. Unless noted otherwise, the setting of
MACSR indicator flags is based on the final result, that is, the result of the final operation involving
the product and accumulator.
shows the registers in the MAC portion of the user programming model.
MAC Programming Model
31
MCF5272 ColdFire
Figure 3-2. MAC Programming Model
®
Integrated Microprocessor User’s Manual, Rev. 3
0
MACSR
ACC
MASK
MAC status register
MAC accumulator
MAC mask register
Freescale Semiconductor
Figure 3-1