MCF5272VF66 Freescale, MCF5272VF66 Datasheet - Page 280

MCF5272VF66

Manufacturer Part Number
MCF5272VF66
Description
Manufacturer
Freescale
Datasheet

Specifications of MCF5272VF66

Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Not Compliant

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Universal Serial Bus (USB)
12.3.2.15 USB Endpoint 0 Interrupt Mask (EP0IMR) and General/Endpoint 0
Figure 12-18
Table 12-14
registers.
12-22
31–17
Bits
16
Reset
Reset
Reset
Reset
Field
Field
Field VEND_REQ FRM_MAT
Field OUT_EOT
Addr
R/W
R/W
R/W
R/W
DEV_CFG
lists field descriptions for the USB endpoint 0 interrupt mask and general/endpoint 0 interrupt
Interrupt Registers (EP0ISR)
shows the USB endpoint 0 interrupt mask and general/endpoint 0 interrupt registers.
Name
31
23
15
7
Interrupt bits are reset by writing a 1 to the specified bits. Writing 0 has no
effect.
MCF5272 ColdFire
OUT_EOP
Figure 12-18. USB Endpoint 0 Interrupt Mask (EP0IMR)
Reserved, should be cleared.
Device configuration change interrupt. Set when a device configuration change has been
received. The USB standard device requests SET_CONFIGURATION and SET_INTERFACE
generate a DEV_CFG interrupt. Any IN or OUT packets to the active endpoints cause a NAK
response to the host while this bit is set in order to allow the user to initialize the endpoints’
FIFO’s. Note that if one of these requests is done repeatedly and therefore the registers don’t
change, a DEV_CFG interrupt is still generated. If debug mode is enabled, a change in FAR also
generates an interrupt.
0 No interrupt pending
1 Device configuration change received
14
6
and General/Endpoint 0 Interrupt Registers (EP0ISR)
Table 12-14. EP0IMR and EP0ISR Field Descriptions
MBAR + 0x108C (EP0IMR); MBAR + 0x106C (EP0ISR)
OUT_LVL
ASOF
13
5
®
Integrated Microprocessor User’s Manual, Rev. 3
IN_EOT
SOF
12
NOTE
4
0000_0000
0000_0000
0000_0000
0000_0000
R/W
R/W
R/W
R/W
WAKE_CHG
IN_EOP
Description
11
3
RESUME
UNHALT
10
2
SUSPEND
HALT
17
9
1
Freescale Semiconductor
DEV_CFG
RESET
IN_LVL
24
16
8
0

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