MCF5272VF66 Freescale, MCF5272VF66 Datasheet - Page 119

MCF5272VF66

Manufacturer Part Number
MCF5272VF66
Description
Manufacturer
Freescale
Datasheet

Specifications of MCF5272VF66

Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Not Compliant

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Chapter 5
Debug Support
This chapter describes the Revision A enhanced hardware debug support in the MCF5272.
5.1
The debug module is shown in
Debug support is divided into three areas:
Freescale Semiconductor
Real-time trace support—The ability to determine the dynamic execution path through an
application is fundamental for debugging. The ColdFire solution implements an 8-bit parallel
output bus that reports processor execution status and data to an external emulator system. See
Section 5.3, “Real-Time Trace
Background debug mode (BDM)—Provides low-level debugging in the ColdFire processor
complex. In BDM, the processor complex is halted and a variety of commands can be sent to the
processor to access memory and registers. The external emulator uses a three-pin, serial,
full-duplex channel. See
“Programming
Real-time debug support—BDM requires the processor to be halted, which many real-time
embedded applications cannot do. Debug interrupts let real-time systems execute a unique service
routine that can quickly save the contents of key registers and variables and return the system to
normal operation. External development systems can access saved data because the hardware
supports concurrent operation of the processor and BDM-initiated commands. See
“Real-Time Debug
Overview
MCF5272 ColdFire
Control
Model.”
BKPT
Support.”
Figure 5-1. Processor/Debug Module Interface
Figure
Trace Port
Section 5.5, “Background Debug Mode
ColdFire CPU Core
Debug Module
®
5-1.
Support.”
Integrated Microprocessor User’s Manual, Rev. 3
Communication Port
DSCLK, DSI, DSO
(BDM),” and
High-speed
local bus
Section 5.4,
Section 5.6,
5-1

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