MCF5272VF66 Freescale, MCF5272VF66 Datasheet - Page 171

MCF5272VF66

Manufacturer Part Number
MCF5272VF66
Description
Manufacturer
Freescale
Datasheet

Specifications of MCF5272VF66

Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
66MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
196
Package Type
MA-BGA
Lead Free Status / RoHS Status
Not Compliant

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6.2.7
The DIR,
register contains the same value as the JTAG IDCODE register. The version number field will change if a
new revision of the MCF5272 is created.
Table 6-8
6.2.8
The software watchdog timer prevents system lockup should the software become trapped in loops with
no controlled exit. The software watchdog timer can be enabled or disabled through WRRR[EN]. If
enabled, the watchdog timer requires the periodic execution of a software watchdog servicing sequence.
If this periodic servicing action does not occur, the timer counts until it reaches the reset timeout value,
resulting in a hardware reset with RSTO driven low for 16 clocks. SCR[RSTSRC] is updated to indicate
that the software watchdog caused the reset.
Freescale Semiconductor
31–28
27–22
21–12
11–1
Bits
Address
Value
Field
R/W
Version number. Indicates the revision number of the MCF5272.
Design center. Indicates the ColdFire design center
Device number. Indicates an MCF5272
Indicates the reduced JEDEC ID for Freescale. Joint Electron Device Engineering Council (JEDEC) Publication
106-A and Chapter 11 of the IEEE Standard 1149.1 give more information on this field.
Figure
describes the DIR fields.
General purpose timers
Ethernet
DMA controller
PWM
Hardware watchdog timer No
Software watchdog timer
Device Identification Register (DIR)
Software Watchdog Timer
31
forK75N
Number
Version
0010
Interrupt Source
6-7, contains a value representing the identification mark for the MCF5272 device. This
28 27
MCF5272 ColdFire
Design Center
0100_01
Table 6-7. Exiting Sleep and Stop Modes (continued)
Figure 6-7. Device Identification Register (DIR)
Yes, interrupt
Yes, interrupt
Yes, interrupt
No
Yes, interrupt
22 21
Table 6-8. DIR Field Descriptions
®
Integrated Microprocessor User’s Manual, Rev. 3
Device Number
00_0000_0011
Exit Sleep
MBAR+0x010
Description
Read only
12 11
Exit Stop USB Wake-on-Ring
No
No
No
No
No
No
0000_0001_110
JEDEC ID
System Integration Module (SIM)
No
No
No
No
No
No
1
1
0
6-11

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