cx28365 Mindspeed Technologies, cx28365 Datasheet - Page 70

• Manufacturer Part Number: cx28365
• Description: X12, X6, X4 T3/e3 Framer And Atm Cell Transmission Convergence Sublayer Processor
• Manufacturer: Mindspeed Technologies

Functional Description
2.1.2.3
2-32
Overhead Bit Recovery
The bit stream arriving from the line side is functionally divided into two categories,
payload and overhead. See
Processing of Overhead Bits
The Overhead bits are processed as follows:
External-Data—All overhead and payload bits exit on the RxDATO pin; a gapped
clock is supplied for skipping Overhead bits, RxGCKO (see
gaps come in one of five types: 1. all Overhead bits, 2. all Overhead bits except
Justification Control bits, 3. all Overhead bits except Stuff Opportunity bits, 4. all
Overhead bits except justification control and Stuff Opportunity bits, 5. or none are
gapped (software-selectable by setting the AllOVHDat and RxCjDat fields of the
Receive Overhead Control register).
Internal—Several fields are internally evaluated for alarm and status detection
(framing bits, RAI/RDI, FEBE/REI, parity, and path parity bits) or supplied to the
system via microprocessor-side buffers or registers (DL, FEAC, PT, PD/MI, TM/
SSM, and AIC).
External-Extended—All overhead and payload bits exit on the RxDATO pin; a clock
is supplied for marking various sets of overhead and payload bits (REXTCKO) (see
Figure
fields:
NOTE:
Preliminary Information/Mindspeed Proprietary and Confidential
In DS3 C-bit parity, the eight independently-selectable field combinations are as
follows:
In DS3 M13/M23, the four independently-selectable field combinations are as
follows:
In E3-G.751, the six independently-selectable field combinations are as follows:
F-bits + M-bits + X-bits + P-bits
Cb11 (AIC)
Cb13 (FEAC)
Cb3 (Path Parity)
Cb4 (FEBE)
Cb5 (Data Link)
Cb12 + Cb2 + Cb6 + Cb7 (Reserved)
F-bits + M-bits + X-bits + P-bits
C-bits
Stuff bits
All Overhead bits + all the payload (effectively a full serial stream)
FAS
A-bit
N-bit
2-14). The output is based on the settings of REXTCKO Control register
– All Overhead bits + all the payload (effectively a full serial stream)
Mindspeed Technologies™
During an OOF condition, the system-side interface continues to function relative to
the previous framing position (the RxSync, RxGCKO, and REXTCKO signals are
relative to the previous framing position) until a new framing template is located, and
the OOF condition is turned off.
Appendix
B.
Figure
2-13). This clock’s
CX28365/6/4 Data Sheet
500028C