cx28365 Mindspeed Technologies, cx28365 Datasheet - Page 188

• Manufacturer Part Number: cx28365
• Description: X12, X6, X4 T3/e3 Framer And Atm Cell Transmission Convergence Sublayer Processor
• Manufacturer: Mindspeed Technologies

Registers
3.5
0xE00—GLOB (Global Control Register)
EnStatLat
EnCntrLat
EnIntPin
OneSecIntEn
DevLogReset
MasterReset
0xE01—SYSBUS (System Bus Control Register)
UtopMode
Handshake
BusWidth
3-78
EnStatLat
—
7
7
(1)
(1)
EnCntrLat
When written to 1, One-second status latching is enabled for all status registers. When written
to 0, status registers are updated continuously.
When written to 1, One-second latching is enabled for all error counters. When written to 0,
error count information is updated continuously.
When written to 1, the interrupt output pin MINTR* is enabled. When written to 0, the
interrupt output is three-stated.
When written to 1, the one-second interrupt is enabled to appear on the MINTR* pin.
When written to 1, all cell delineator device logic functions, for all ports, are held in reset
mode.
When written to 1, all internal state machines are held in reset mode and all control registers
are set to their default values (except bit 0 in this register).
When written to 1, the system bus operates in UTOPIA Level 2 mode and forces the
handshake mode to cell handshaking. When written to 0, the system bus operates in UTOPIA
Level 1 mode (can be used only for port0 operation).
When written to 1, cell handshaking is enabled on the UTOPIA bus. When written to 0, octet
handshaking is enabled.
When written to 0, a 16-bit UTOPIA bus is enabled. When written to 1, an 8-bit UTOPIA bus
is enabled.
Common Global Registers (0xE00—0xE7F)
—
6
6
Value after reset: 00
Direction: Read/Write
Value after reset:06
Direction: Read/Write
NOTE:
Preliminary Information/Mindspeed Proprietary and Confidential
EnIntPin
—
5
5
Mindspeed Technologies™
(1) DevLog Reset and MasterReset should be held active for four 8KHzIn clocks to
reset OneSec circuitry. 8KHzIn (pin A5) can be sped up to MCLK (pin E4) rate during
reset
OneSecIntEn
—
4
4
—
—
3
3
UtopMode
—
2
2
DevLogReset
Handshake
1
1
CX28365/6/4 Data Sheet
MasterReset
BusWidth
0
0
500028C