cx28365 Mindspeed Technologies, cx28365 Datasheet - Page 61

• Manufacturer Part Number: cx28365
• Description: X12, X6, X4 T3/e3 Framer And Atm Cell Transmission Convergence Sublayer Processor
• Manufacturer: Mindspeed Technologies

CX28365/6/4 Data Sheet
500028C
threshold, the value of which can be set to 0 to 126. The Near-Empty event results in
an interrupt, if enabled. It is used to help the system control and use the FIFO buffer
with minimum need to access the FIFO status bits.
FIFO Underrun
A FIFO underrun condition is caused when the internal transmit logic has emptied the
FIFO buffer without encountering an end of message and the transmit logic request
for the next byte to be transmitted. This causes an ABORT sequence (16 consecutive
1s) to be transmitted followed by at least two FLAG sequences. After an ABORT +
two FLAG sequences, the transmit internal circuitry is ready to start transmitting a
new message as soon as it is written to the FIFO buffer.
As soon as an underrun condition is declared internally, an interrupt is issued (if
enabled) and the FIFO buffer prevents additional data bytes from being written to it.
The underrun interrupt is cleared upon reading the Transmit Data Link FEAC Status
register. Writing to the FIFO buffer is enabled again only after the interrupt is cleared.
The system checks the amount of data bytes that may have been written and lost
between the time the first underrun interrupt occurred and the system reads the FIFO
status register and senses a underrun condition.
Writing to FIFO when FIFO is Full
When the FIFO buffer is full, writing to the FIFO buffer by the microprocessor is
ignored by the circuit, and no indication for ignoring written data during a FIFO Full
condition is supplied. Neither data bytes and pointers of the FIFO buffer, nor the
HDLC formatting and message providing mechanisms are affected by writing into the
FIFO during FIFO full condition.
FLAG Transmission
The TDL machine generates and transmits a flag sequence (01111110) automatically
in the following cases:
1.
2.
3.
4.
Preliminary Information/Mindspeed Proprietary and Confidential
After enabling the data link, FLAG sequences are transmitted automatically until
a new message starts. At least two FLAG sequences are transmitted before the
new message begins.
Between two consecutive transmitted messages, two FLAG sequences are
automatically inserted. In the FIFO buffer contains more than one message (after
the FCS is transmitted, if FCS transmission is enabled), the transmitter sends two
FLAG sequences after the last byte of the previous message is sent before starting
transmission of the first byte of the new message (the next byte to be transmitted
in the FIFO buffer after an EOM byte).
If the current message is the last message in the FIFO buffer (FIFO is empty, and
the last byte is indicated as an EOM byte), the transmitter sends FLAG sequences
continuously after the end of the message and as long as the FIFO buffer is empty.
After sending one abort sequence (sixteen 1s in underrun condition), the
transmitter automatically starts transmitting FLAG sequences for as long as the
FIFO buffer is empty (at least two FLAG sequences are transmitted before
starting a new message).
Mindspeed Technologies™
Functional Description
2
-
23