cx28365 Mindspeed Technologies, cx28365 Datasheet - Page 50

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cx28365

Manufacturer Part Number
cx28365
Description
X12, X6, X4 T3/e3 Framer And Atm Cell Transmission Convergence Sublayer Processor
Manufacturer
Mindspeed Technologies
Datasheet
Functional Description
2-12
E3–G.751 Mode
E3-G.751 frame structure has 24 frame Overhead bits, which are divided as follows:
The External-Data source option for the E3-G.751 mode provides the following
options of framing bits insertion with the data stream:
When the frame Overhead bits are not chosen to be inserted via the data stream, the
following source options are provided for each group of frame Overhead bits:
Preliminary Information/Mindspeed Proprietary and Confidential
the second, sixth, and seventh M-subframe are reserved bits—all together, they can
either be generated internally or provided from an external pin. When bit
DLMod[0] is set to 1, those bits are taken from the TEXTI pin. When this bit is set
to 0, they are all internally generated and transmitted as 1.
10 frame alignment signal (FAS) bits
Alarm indication to the remote digital multiplex equipment (A-bit) bit
Bit reserved for national use (N-bit)
12 justification service bits (Cj-bits)
All Overhead bits can be inserted with the data stream by setting bit ExtDat to 1.
Only Cj-bits enter with the data stream and the 4 Stuff Opportunity bits are
inserted via TEXTI by setting bit ExtDat to 0, bit ExtFEBE/Cj to 0, and ExtStf to
0. The rest of the Overhead bits (FAS, A, and N) source is set separately.
Both Cj-bits and the 4 Stuff Opportunity bits are inserted with the data by setting
ExtDat=0 and ExtFEBE/Cj = 0 and ExtStf = 0.
None of the Overhead bits or stuff bits are inserted with data (they are either
generated internally or enter through external pin) by setting bits ExtDat and
ExtFEBE/Cj to 0 and 1 respectively, and ExtStf to 1.
FAS—Bits 1 to 10 of set 1 are used as the frame alignment signal. Those bits are
generated automatically internally by the transmitter circuit and inserted at the
beginning of each E3-G.751 frame transmission. The 10 FAS bits have the
sequence 1111010000 (transmitted from left to right), or they can be inserted
through the TEXTI pin by setting bit ExtFrmA1.
A-bit—Bit 11 of set 1 is the alarm indication to the remote digital multiplex
equipment bit (used to send RAI alarm signal). This bit can be automatically
internally generated, controlled by a register or inserted through the TEXTI pin.
Automatic RAI generation is enabled by setting bit AutoRAI in the Transmit
Overhead Insertion 1 Control register to 1. In this mode, as long as a Loss of
Signal (LOS) condition or loss of frame alignment (Out of Frame [OOF]) are
detected at the RCV , the TRN automatically inserts 1 at the transmitted A-bit.
When LOS and OOF conditions are not detected, the TRN sets the transmitted A-
bit to 0 (no RAI alarm). When AutoRAI = 0, setting the ExtRAI bit in the
Transmit Overhead Insertion 2 Control register to 1 causes A-bit insertion through
the TEXTI pin. For as long as TxAlm[1] is set to 1, the A-bit contains 1 regardless
of other A-bits sourcing settings.
N-bit—Bit 12 of set 1 is reserved for national use. Its value can be taken from the
TEXTI input pin when bits DLMod[2] and DLMod[1] in the Transmit Overhead
Insertion 1 Control register are both set to 1. It can be automatically set to 1 by the
framer when bit DLMod[2] is set to 0, or it can be chosen internally generated by
registers when DLMod[2] and DLMod[1] are set to 10. The last option
Mindspeed Technologies™
CX28365/6/4 Data Sheet
500028C

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