cx28365 Mindspeed Technologies, cx28365 Datasheet - Page 113

• Manufacturer Part Number: cx28365
• Description: X12, X6, X4 T3/e3 Framer And Atm Cell Transmission Convergence Sublayer Processor
• Manufacturer: Mindspeed Technologies

CX28365/6/4 Data Sheet
Table 3-2. Cell Delineator Control and Status Registers (2 of 3)
500028C
0x0D
0x0E
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x29
0x2A
0x2B
0x2C
0x2D
0x2E
Register
Address
Offset
UTOP1
UTOP2
RXUDF2
TXHDR1
TXHDR2
TXHDR3
TXHDR4
TXIDL1
TXIDL2
TXIDL3
TXIDL4
RXHDR1
RXHDR2
RXHDR3
RXHDR4
RXMSK1
RXMSK2
RXMSK3
RXMSK4
RXIDL1
RXIDL2
RXIDL3
RXIDL4
IDLMSK1
IDLMSK2
IDLMSK3
IDLMSK4
ENCELLT
ENCELLR
TXCELLINT
RXCELLINT
TXCELL
Name
—
—
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R/W
Type
Preliminary Information/Mindspeed Proprietary and Confidential
—
—
One-second
Mindspeed Technologies™
Latching
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(1)
UTOPIA Control Register 1
UTOPIA Control Register 2
Receive UTOPIA UDF2 Octet Register
Transmit Cell Header Control Register 1
Transmit Cell Header Control Register 2
Transmit Cell Header Control Register 3
Transmit Cell Header Control Register 4
Transmit Idle Cell Header Control Register 1
Transmit Idle Cell Header Control Register 2
Transmit Idle Cell Header Control Register 3
Transmit Idle Cell Header Control Register 4
Receive Cell Header Control Register 1
Receive Cell Header Control Register 2
Receive Cell Header Control Register 3
Receive Cell Header Control Register 4
Receive Cell Mask Control Register 1
Receive Cell Mask Control Register 2
Receive Cell Mask Control Register 3
Receive Cell Mask Control Register 4
Receive Idle Cell Header Control Register 1
Receive Idle Cell Header Control Register 2
Receive Idle Cell Header Control Register 3
Receive Idle Cell Header Control Register 4
Receive Idle Cell Mask Control Register 1
Receive Idle Cell Mask Control Register 2
Receive Idle Cell Mask Control Register 3
Receive Idle Cell Mask Control Register 4
Transmit Cell Interrupt Control Register
Receive Cell Interrupt Control Register
Reserved, set to a logic 0
Reserved, set to a logic 0
Transmit Cell Interrupt Indication Control Register
Receive Cell Interrupt Indication Control Register
Transmit Cell Status Control Register
Description
Page Number
3-25
3-25
3-26
3-14
3-15
3-15
3-15
3-16
3-16
3-16
3-17
3-19
3-19
3-20
3-20
3-20
3-21
3-21
3-21
3-22
3-22
3-22
3-23
3-23
3-23
3-24
3-24
3-28
3-28
3-29
3-29
3-30
—
—
Registers
3
-
3