cx28365 Mindspeed Technologies, cx28365 Datasheet - Page 44

• Manufacturer Part Number: cx28365
• Description: X12, X6, X4 T3/e3 Framer And Atm Cell Transmission Convergence Sublayer Processor
• Manufacturer: Mindspeed Technologies

Functional Description
Figure 2-5. DS3 System Transmit Timing (TxSync Indicates Overhead Bits)
Figure 2-6. DS3 System Transmit Timing (TxSync[i] as Input Indicating Frame Start)
2-6
TxGCKO(inv)
TXGCKO(inv)
TxGCKO
TxSYNC
TXGCKO
TxDATI
TxSync
TxCKI
TxDATI
TxCKI
Subframe 6
Subframe 6
84 Payload bits
84 Payload bits
Figure 2-5
TxSYNC is low during all overhead bits position and high during all payload data bit
positions.
Figure 2-6
input signal. The signal is sampled on the falling edge of TxCKI. The framer also
expects the TxSync[i] signal to be low during the last bit of the previous frame before
transitioning high during the first bit of the next frame.
The behavior of the TxGCKO signal is shown both in normal and inverted mode.
Since none of the overheads are set to be inserted with the payload, TxGCKO is
gapped during all overhead bits illustrated in
Preliminary Information/Mindspeed Proprietary and Confidential
illustrates the TxSync[i] signal configured as a frame start synchronization
illustrates TxSYNC as an overhead indication output signal. Here
Mindspeed Technologies™
M3
M3
The full behavior is not
The full behavior is not
679 bits of Subframe 7 including its
shown for this section
shown for this section
The full behavior is not
679 bits of Subframe 7 including its
shown for this section
Subframe 7
Subframe 7
overhead bits
overhead bits
Figures 2-4
X1
X1
through 2-6.
Subframe 1
Subframe 1
84 Payload bits
84 Payload bits
CX28365/6/4 Data Sheet
500028A_019a
500028C
500028_019