cx28365 Mindspeed Technologies, cx28365 Datasheet - Page 164

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cx28365

Manufacturer Part Number
cx28365
Description
X12, X6, X4 T3/e3 Framer And Atm Cell Transmission Convergence Sublayer Processor
Manufacturer
Mindspeed Technologies
Datasheet
Registers
ExtFrm
AllRxExt
3-54
External Framing Fields—In DS3 modes, set to enable presentation of M, F, X, and P-bits
through the REXTCKO pin. In E3-G.751 mode, set to enable presentation of FAS field
through the REXTCKO pin. In E3-G.832 mode, set to enable presentation of FA1, FA2, EM,
RDI, and PT fields through REXTCKO pin.
All Received Data is External—Set to enable presentation of the complete frame; i.e., payload
and Opportunity bits, through REXTCKO pin. This bit is available in all framing modes.
When this bit is set, it overrides the rest of the bits in this register. Presentation of Opportunity
bits through the RxGCKO pin or through the microprocessor interface in parallel to
REXTCKO is determined by the Receive Overhead Control register and by the RxDLEn bit in
Receive Data Link Control register.
Preliminary Information/Mindspeed Proprietary and Confidential
Mindspeed Technologies™
CX28365/6/4 Data Sheet
500028C

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