cx28365 Mindspeed Technologies, cx28365 Datasheet - Page 165

• Manufacturer Part Number: cx28365
• Description: X12, X6, X4 T3/e3 Framer And Atm Cell Transmission Convergence Sublayer Processor
• Manufacturer: Mindspeed Technologies

CX28365/6/4 Data Sheet
0x2C—CR12 (Receive Overhead Control Register)
RxStfDat
RxCjDat
AllOVHDat
500028C
RxStfDat
—
7
X
0
0
1
1
Received Stuff Opportunity Bits in the Data Stream—Set to enable presentation of the Stuff
Opportunity bits in the Data Stream over RxDATO pin in DS3-M13/M23 and E3-G.751
modes. When set, RXGCKO is not gapped over the Stuff Opportunity bit positions. When
clear, the Stuff Opportunity bits are not extracted (i.e., RXGCKO is gapped over their bit
positions). When AllOVHDat bit in this register is set, this bit is ignored. In DS3-C-Bit Parity
and E3-G.832 modes, this bit is ignored.
Received Justification Control Bits in the Data Stream—Set to enable presentation of the
Justification Control bits in the data stream over RxDATO pin in DS3-M13/M23 and E3-
G.751 modes. When set, RXGCKO is not gapped over the Justification Control bit positions.
When clear, the Justification Control bits are not extracted (i.e., RXGCKO is gapped over their
bit positions). When AllOVHDat bit in this register is set, this bit is ignored. In DS3-C-Bit
Parity and E3-G.832 modes, this bit is ignored.
All Overhead Bits Are in the Data Stream—Set to enable presentation of the complete frame
in the data stream over RxDATO pin (i.e., RxGCKO is a nominal clock, it is not gapped). This
bit is available in all framing modes. When this bit is set, it overrides RxCjDat and RxStfDat
bits in this register. When this bit is cleared, presenting the Justification Control bits on
RxDATO (RxGCKO gapping over Cj-bit positions) is determined by RxCjDat bit in this
register, and presenting the Stuff Opportunity bits in RxDATO (RxGCKO gapping over Stuff
bits positions) is determined by RxStfDat bit in this register. Other Opportunity bits are not
presented on RxDATO pin when this bit is cleared (i.e., RxGCKO is gapped accordingly).
The following table details RxGCKO output behavior in different modes according to these bit
settings:
RxCjDat
—
6
X
0
1
0
1
Default after reset: 00
Direction: Read/Write
Modification: Static
Preliminary Information/Mindspeed Proprietary and Confidential
AllOVHDat
—
5
1
0
0
0
0
Mindspeed Technologies™
Nominal
Tick on Payload bits only (also not on Stuff Opportunity bits)
Ticks only on Payload bits and on Justification Control bits (in DS3-M13/
M23 and in E3-G.751)
Ticks only on Payload bits and on Stuff Opportunity bits (in DS3-M13/M23
and in E3-G.751)
Ticks on Payload, Stuff Opportunity, and Justification Control bits (in DS3-
M13/M23 and in E3-G.751)
—
4
—
3
RxGCKO Output Behavior
RxStfDat
2
RxCjDat
1
AllOVHDat
0
Registers
3
-
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