cx28365 Mindspeed Technologies, cx28365 Datasheet - Page 217

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cx28365

Manufacturer Part Number
cx28365
Description
X12, X6, X4 T3/e3 Framer And Atm Cell Transmission Convergence Sublayer Processor
Manufacturer
Mindspeed Technologies
Datasheet
500028C
Appendix A: Device Initialization
To reliably initialize the device, use the following initialization routine:
To enable a port:
* To select the proper configuration, see PMODE, Port Mode Control, in the Cell
Delineation register group and CR00, Mode Control, in the Framer register group in
this data sheet.
Repeat steps 2–16 with the proper offsets for each port.
Preliminary Information/Mindspeed Proprietary and Confidential
13) reset tx and rx fifo
14) disassert port logic reset
15) enable utopia output
16) enable cell receiver
1)
2)
3)
4)
5)
6)
7)
8)
9)
10) set rx_clk polarity
11) set tx sync pin to output
12) set rx gap clock to clock all data
device master reset
assert port logic reset
disable cell receiver
enable framer
set atm frame type
set framer type
enable plcp
set rx_sync polarity
set tx_sync polarity
Mindspeed Technologies™
0xe80
0x00d
0x00e
0xe00
0xe00
0x00c
0xe90
0x004
0x820
0x300
0x005
0x005
0x005
0x825
0x82c
0xe80
0x00d
0x00c
0x00
0xc0
0x00
0x01
0x00
0x02
0x10
0x*
0x*
0x80
0x40
0x50
0x70
0x08
0x01
0x01
0x00
0x00
A
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