cx28365 Mindspeed Technologies, cx28365 Datasheet - Page 101

• Manufacturer Part Number: cx28365
• Description: X12, X6, X4 T3/e3 Framer And Atm Cell Transmission Convergence Sublayer Processor
• Manufacturer: Mindspeed Technologies

CX28365/6/4 Data Sheet
2.4.6.1
Figure 2-19. Input/Output Ports Application Example (Framer and LIU Control)
500028C
NOTE(S):
(1)
(2)
RxGoodBlk
StatByte
FEBECtrltr
TxFEACltr bit is enabled by TxFEACIE (bit 6) in CR06 (0x26).
These bits are status bits only. No interrupt is linked to them.
Reserved
Reserved
Reserved
Reserved
Reserved
XdgrCtrltr
PdgrCtrltr
EXZCtrltr
LCVCtrltr
OOFEnd
FerrCtrltr
LOSEnd
PthCtrltr
ParCtrltr
RxBlk
RxOVR
IdleEnd
AISEnd
RxMsg
YelEnd
Outputs Enabled
Outputs Enabled
Outputs Enabled
RxNF
by CR16(0x31)
by CR03(0x23)
by CR01(0x21)
SR11 (0x4 B)
SR04 (0x44)
SR02 (0x42)
(2)
(2)
(2)
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
OR
OR
OR
Interrupt Routing
NonZerGFCInt
InvalPFebeInt
PLCPFebeInt
RxFEACSNE
PLCPOOFInt
PLCPLOGInt
NonMatchInt
TxFEACltr
RxFEACIdle
PLCPFrmint
PLCPBIPInt
BusCnflctInt
PLCPYellInt
HECCorrInt
CellRcvdInt
IdleRcvdInt
Preliminary Information/Mindspeed Proprietary and Confidential
TxEmpty
CellSentInt
RxFEACltr
HECDetInt
SOCErrInt
RcvrHldInt
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
RxOvflInt
TxOvflInt
ParErrInt
LOCDInt
TxFull
OOFStrt
LOSStrt
SEFStrt
TXCELLINT (0x2C)
RXCELLINT (0x2D)
by ENCELLR (0x29)
by ENCELLT (0x28)
IdleStrt
AISStrt
TxMsg
YelStrt
Outputs Enabled
Outputs Enabled
Outputs Enabled
Outputs Enabled
Outputs Enabled
Outputs Enabled
by ENPLCP(0x6)
TxUR
TxNE
PLCPINT (0x5)
by CR13(0x20)
by CR06(0x26)
by CR02(0x22)
F1Int
SR08 (0x48)
SR17 (0x51)
SR03 (0x43)
(1)
(2)
(2)
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Mindspeed Technologies™
OR
OR
OR
OR
OR
OR
TxDLFEACltr
RxFEACltrS
AlarmEndltr
AlarmStrtltr
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
RxCellInt
TxCellInt
PLCPInt
RxDLltr
by ENSUMINT(0x1)
Outputs Enabled
Ctrltr
SUMINT (0x0)
SR01 (0x41)
Reserved
FrmrInt0
CDInt0
PORTINT (0xE90)
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Lint0
7
6
5
4
3
2
1
0
OR
OR
OR
From
Port 11
GLOBINT (0xE04-0xE05)
OneSecInt
Port11Int
Port8Int
Port7Int
Port0Int
GLOB (0xE00)
4
3
0
7
0
7
6
5
4
3
2
1
0
OR
Functional Description
500028_036
Mint~
2
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