cx28365 Mindspeed Technologies, cx28365 Datasheet - Page 66

• Manufacturer Part Number: cx28365
• Description: X12, X6, X4 T3/e3 Framer And Atm Cell Transmission Convergence Sublayer Processor
• Manufacturer: Mindspeed Technologies

Functional Description
Figure 2-11. Line Coding Error Insertion
2-28
Unipolar Input to
Encoder
Bipolar Output
Without Errors
Bipolar Output With
BPV Error Request
on A to H
Bipolar Output
With IIISub Error
Request on A to E
In rail mode, an illegal substitution (IllSub) can be inserted by setting the LCVIllSub
bit in Error Insertion2 Control register. The next 000 (in DS3) or 0000 (in E3)
arriving after the bit is set is reversed (00V to 10V or vice versa in DS3; 000V to
100V or vice versa in E3). Then the encoding circuitry adjusts itself to the reversed
signal, causing the following output to be the reverse of the one that would have been
produced had this error not been introduced; otherwise, each error insertion would
also result in a BPV.
Figure 2-11
given unipolar input (assumes ideal conditions where there is no delay between the
error insertion request and its execution):
NOTE:
Preliminary Information/Mindspeed Proprietary and Confidential
Unipolar input (from transmitter circuitry to encoder) of 13 bits, marked A to M
Bipolar output (from encoder to line) without errors
Bipolar output with BPV error insertion requested on bits A to H
Bipolar output with IllSub error insertion requested on bits A to E
illustrates the possible bipolar outputs (in DS3 B3ZS) resulting from a
Mindspeed Technologies™
The actual erroneous bits are circled in the
insertion are reversed compared to the original line 2 (i.e., bits K–M in line 3, and I–M
in line 4).
A
1
B
0
C
1
D
0
E
1
F
B
0
0
G
0
0
0
H
0
V
V
Figure
1
I
J
1
2-11. Bits following an error
K
B
0
L
0
0
M
0
V
CX28365/6/4 Data Sheet
500028C
500028_024