cx28365 Mindspeed Technologies, cx28365 Datasheet - Page 32

• Manufacturer Part Number: cx28365
• Description: X12, X6, X4 T3/e3 Framer And Atm Cell Transmission Convergence Sublayer Processor
• Manufacturer: Mindspeed Technologies

Product Description
Table 1-5. Hardware Signal Definition, Programmable Input/Output Interface (1 of 2)
1-18
OutPort1[0] / LStatOut[0]
OutPort1[1] / LStatOut[1]
OutPort1[2] / LStatOut[2]
OutPort1[3] / LStatOut[3]
OutPort1[4] / LStatOut[4]
OutPort1[5] / LStatOut[5]
OutPort1[6] / LStatOut[6]
OutPort1[7] / LStatOut[7]
OutPort1[8] / LStatOut[8]
OutPort1[9] / LStatOut[9]
OutPort1[10] / LStatOut[10]
OutPort1[11] / LStatOut[11]
OutPort2[0] / LCS*[0]
OutPort2[1] / LCS*[1]
OutPort2[2] / LCS*[2]
OutPort2[3] / LCS*[3]
OutPort2[4] / LCS*[4]
OutPort2[5] / LCS*[5]
OutPort2[6] / LCS*[6]
OutPort2[7] / LCS*[7]
OutPort2[8] / LCS*[8]
OutPort2[9] / LCS*[9]
OutPort2[10] / LCS*[10]
OutPort2[11] / LCS*[11]
InPort1[0] / LIntR[0]/RxSync[0]
InPort1[1] / LIntR[1]/RxSync[1]
InPort1[2] / LIntR[2]/RxSync[2]
InPort1[3] / LIntR[3]/RxSync[3]
InPort1[4] / LIntR[4]/RxSync[4]
InPort1[5] / LIntR[5]/RxSync[5]
InPort1[6] / LIntR[6]/RxSync[6]
InPort1[7] / LIntR[7]/RxSync[7]
InPort1[8] / LIntR[8]/RxSync[8]
InPort1[9] / LIntR[9]/RxSync[9]
InPort1[10] / LintR[10]/RxSync[10]
InPort1[11] / LIntR[11]/
RxSync[11]
Label
Pin
Preliminary Information/Mindspeed Proprietary and Confidential
General Purpose Output
Port 1
Line Status Output
General Purpose Output
Port 2
Line External Framer Chip
Select
General Purpose Input
Port 1
Interrupt Request
Framer RxSync Output
Mindspeed Technologies™
Signal
Name
CX2836x
AD26
AC24
AB24
AA24
Pin#
M23
AD1
AD2
AC1
AB1
AA1
AC7
AF3
AE3
N23
L23
K23
H23
G23
E23
L24
K24
J23
F23
J24
M2
H1
G1
D1
L1
K1
J1
F1
E1
C1
B1
A3
I
O/Z
O/Z
I/O
P/
O
These pins can be individually
configured as general purpose output
or status output pins. Refer to Port
Mode Control registers, PORTn.
As a general purpose output port, it
reflects the corresponding bit setting in
the OUTPORT1 register.
As a Line status Output, it reflects one
of the signals below depending upon
the value of Out1Mode[1:0] field.
LstatOut
LOCD (or PLCP LOF)
OOF from framer
Yellow Alarm from framer 10
OUTPORT1 register
These pins can be individually
configured as general purpose output
or chip select output pins. Refer to Port
Mode Control registers, PORTn.
As general purpose output pins, they
reflect the corresponding bit values in
the OUTPORT 2 register.
As chip select outputs, an LCS pin is
activated if the processor accesses an
address within its range. The polarity of
these signals is set by CsPol (bit 2) in
the IOMODE registers.
The value on these 12 general purpose
input pins can be read via registers
IN1L and IN1H.
These inputs can also be individually
configured as interrupt inputs; refer to
the PORTINTn register description.
Internally pulled up.
If configured as output pins, the
corresponding RxSync from the framer
block is available on these pins.
Definition
CX28365/6/4 Data Sheet
Out1Mode[1:0]
11
00
01
500028C